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Index.md

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+# Custom ISA Reference
+[GitHub Repository](https://github.com/nullndvoid/custom_isa_design)
+
+# ISA Reference
+
+The DSA (Damn Simple Architecture)
+A programming and microarchitecture [guide](https://github.com/nullndvoid/custom_isa_design)
+
+| Name           | Email                       |
+|----------------|-----------------------------|
+| Jacob Hinchliffe | jjh413@student.bham.ac.uk |
+| Harry Irving     | hxi486@student.bham.ac.uk |
+| Tom Lee          | txl440@student.bham.ac.uk |
+| Ali Awan         | aha480@student.bham.ac.uk |
+
+## Preface
+Inspired by the **PATP**~[1] and Patterson's descriptions of **MIPS**~[2], as well as some of the **MIPS** instruction set~[3], we are looking to create a small and simple ISA and a microprocessor to implement this, as well as a toolchain to compile/assemble programs for our ISA. This is not intended to be a full-fledged ISA, but rather a simple one that we can use to learn about the design of ISAs and microprocessors, as well as the design of compilers, toolchains, and emulators.
+
+The ISA is designed to be simple and easy to understand, with a small number of instructions and a simple addressing mode. When writing Verilog, we will aim for instructions to execute in a single clock cycle.
+
+**This is a work in progress. Below is a list of things we want to do.**
+- Write an assembler
+- Write a disassembler
+- Write an emulator (Harry wants this to be architecturally agnostic)
+
+## Table of Contents
+- [Memory](memory/memory)
+- [Instruction Set](instruction_set)
+- [I/O](io)
+- [File Formats](file_formats)
+- [Questions]
+
+## Appendix
+**References**
+- [1] "PATP" 2024
+- [2] Patterson, "Computer Architecture: A Quantitative Approach," 2009
+- [3] MIPS Technologies Inc., "MIPS32 Architecture For Programmers Volume II," 2008