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Update Instruction Set

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### Load/Store and Data Movement Instructions
| Hex | Code | Operands | Description |
|--------|------|--------------------|--------------------------------------------------------------------------------------------------|
| 0x01 | MOV | [reg0, reg1] | Copies the value from reg0 to reg1. |
| 0x02 | LDB | [reg, offset(base)]| Loads a byte from memory address (base + offset) into `reg'. The effective address must be byte-aligned.|
Instruction-Set.md
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# Instruction Set
## Overview
Below is an overview of the instruction set and the various operands. This table is non-exhaustive and may be updated as the design changes. *Please note that the table spans multiple pages.*
Also note that immediate (constant/literal) arguments are 16-bits long in I (immediate argument) typed instructions. For more information on this, refer to instruction encoding.
### Instruction Format
|Instruction Type| bits 0-7 | bits 8-15 | bits 16-23 | bits 23-31 |
|-|-|-|-|-|
|basic|opcode|operand 1|operand 2|operand 3|
|literal|opcode|value part 1|value part 2|value part 3|
### Load/Store and Data Movement Instructions
| Hex | Code | Operands | Description |
|--------|------|--------------------|--------------------------------------------------------------------------------------------------|
| 0x01 | MOV | [reg0, reg1] | Copies the value from reg0 to reg1. |
| 0x02 | LDB | [reg, offset(base)]| Loads a byte from memory address (base + offset) into `reg'. The effective address must be byte-aligned.|
| 0x03 | LDH | [reg, offset(base)]| Loads a half-word (2 bytes) from memory address (base + offset) into `reg'. The effective address must be 2-byte aligned.|
| 0x04 | LDW | [reg, offset(base)]| Loads a word (4 bytes) from memory address (base + offset) into `reg'. The effective address must be 4-byte aligned.|
| 0x05 | STB | [reg, offset(base)]| Stores the least significant byte in `reg' into memory at address (base + offset). The effective address must be byte-aligned.|
| 0x06 | STH | [reg, offset(base)]| Stores a half-word (the least significant 16 bits) from `reg' into memory at address (base + offset). The effective address must be 2-byte aligned.|
| 0x07 | STW | [reg, offset(base)]| Stores a word (4 bytes) from `reg' into memory at address (base + offset). The effective address must be 4-byte aligned.|
| 0x21 | PSH | [reg] | Pushes the value in the specified register onto the stack. |
| 0x22 | POP | [reg] | Pops the value from the stack into the specified register. |
| 0x23 | LUI | [value, reg] | Loads a 16-bit sign-extended literal value into reg, setting the top 16 bits of the word. To populate the lower 16 bits, see LLI.|
| 0x24 | LLI | [value, reg] | Loads a 16-bit sign-extended literal value into reg, setting the bottom 16 bits of the word. To populate the upper 16 bits, see LLI.|
### Arithmetic Instructions
| Hex | Code | Operands | Description |
|--------|------|----------|-------------------------------------------------------------------------|
| 0x08 | ADD | [reg] | Adds the value in the specified register to the value in the accumulator.|
| 0x09 | SUB | [reg] | Subtracts the value in the specified register from the value in the accumulator.|
| 0x0A | INC | [reg] | Increments the value in the given register. |
| 0x0B | DEC | [reg] | Decrements the value in the given register. |
### Logical Instructions
| Hex | Code | Operands | Description |
|--------|------|-------------------|---------------------------------------------------|
| 0x0E | AND | [reg1, reg2, dest]| Performs bitwise AND function on two values. |
| 0x0F | ORR | [reg1, reg2, dest]| Performs bitwise OR function on two values. |
| 0x10 | NOT | [reg1, dest] | Performs bitwise NOT function on a value. |
| 0x11 | XOR | [reg1, reg2, dest]| Performs bitwise XOR function on two values. |
| 0x12 | NAND | [reg1, reg2, dest]| Performs bitwise NAND function on two values. |
| 0x13 | NOR | [reg1, reg2, dest]| Performs bitwise NOR function on two values. |
| 0x14 | XNOR | [reg1, reg2, dest]| Performs logical XNOR function on two values. |
### Shift Instructions
| Hex | Code | Operands | Description |
|--------|------|----------|---------------------------------------------------------|
| 0x0C | SHL | [reg] | Shifts the value in the specified register left by one bit.|
| 0x0D | SHR | [reg] | Shifts the value in the specified register right by one bit.|
### Control Flow Instructions
| Hex | Code | Operands | Description |
|--------|------|----------|---------------------------------------------------------------------------|
| 0x16 | JMP | [addr] | Unconditionally jumps to addr. |
| 0x17 | JEQ | [addr] | Jumps to addr if equal flag set. |
| 0x18 | JNE | [addr] | Jumps to addr if equal flag not set. |
| 0x19 | JGT | [addr] | Jumps to addr if greater than flag set. |
| 0x1A | JGE | [addr] | Jumps to addr if greater than flag or equal flag set. |
| 0x1B | JLT | [addr] | Jumps to addr if less than flag set. |
| 0x1C | JLE | [addr] | Jumps to addr if less than flag or equal flag set. |
| 0x1F | CLL | [addr] | Performs a jump, saving the return address to the RET register. |
| 0x20 | RET | n/a | Returns from a subroutine using the address in the RET register. |
| 0x1E | INT | [int code]| Initiates an interrupt with the given interrupt code. |
| 0x25 | IRT | n/a | IRET instruction to return from interrupts. |