From a2503e234d626a9c708a9754f481d36493706455 Mon Sep 17 00:00:00 2001 From: zxq5 Date: Mon, 16 Jun 2025 16:01:19 +0100 Subject: [PATCH] Add Index --- Index.md | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Index.md diff --git a/Index.md b/Index.md new file mode 100644 index 0000000..69bfe77 --- /dev/null +++ b/Index.md @@ -0,0 +1,37 @@ +# Custom ISA Reference +[GitHub Repository](https://github.com/nullndvoid/custom_isa_design) + +# ISA Reference + +The DSA (Damn Simple Architecture) +A programming and microarchitecture [guide](https://github.com/nullndvoid/custom_isa_design) + +| Name | Email | +|----------------|-----------------------------| +| Jacob Hinchliffe | jjh413@student.bham.ac.uk | +| Harry Irving | hxi486@student.bham.ac.uk | +| Tom Lee | txl440@student.bham.ac.uk | +| Ali Awan | aha480@student.bham.ac.uk | + +## Preface +Inspired by the **PATP**~[1] and Patterson's descriptions of **MIPS**~[2], as well as some of the **MIPS** instruction set~[3], we are looking to create a small and simple ISA and a microprocessor to implement this, as well as a toolchain to compile/assemble programs for our ISA. This is not intended to be a full-fledged ISA, but rather a simple one that we can use to learn about the design of ISAs and microprocessors, as well as the design of compilers, toolchains, and emulators. + +The ISA is designed to be simple and easy to understand, with a small number of instructions and a simple addressing mode. When writing Verilog, we will aim for instructions to execute in a single clock cycle. + +**This is a work in progress. Below is a list of things we want to do.** +- Write an assembler +- Write a disassembler +- Write an emulator (Harry wants this to be architecturally agnostic) + +## Table of Contents +- [Memory](memory/memory) +- [Instruction Set](instruction_set) +- [I/O](io) +- [File Formats](file_formats) +- [Questions] + +## Appendix +**References** +- [1] "PATP" 2024 +- [2] Patterson, "Computer Architecture: A Quantitative Approach," 2009 +- [3] MIPS Technologies Inc., "MIPS32 Architecture For Programmers Volume II," 2008