 zxq5
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d5a690563b
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fixed some clippy errors
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2025-06-19 15:44:42 +01:00 |
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zxq5
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c1d72e8d4c
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Merge remote-tracking branch 'refs/remotes/origin/main'
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2025-06-19 15:21:07 +01:00 |
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zxq5
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e308362533
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idk
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2025-06-19 15:18:48 +01:00 |
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zxq5
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5784beafbc
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An idiot admires complexity, a genius admires simplicity, a physicist tries to make it simple, for an idiot anything the more complicated it is the more he will admire it, if you make something so clusterfucked he can't understand it he's gonna think you're a god cause you made it so complicated nobody can understand it. That's how they write journals in Academics, they try to make it so complicated people think you're a genius
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2025-06-19 02:58:30 +01:00 |
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zxq5
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ccc4421bb1
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I should go to sleep frfr.
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2025-06-19 02:56:15 +01:00 |
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zxq5
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11a107e56d
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wrote print.dsa
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2025-06-19 01:57:47 +01:00 |
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zxq5
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6b58a17f03
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fixed a lot of bugs with the emulator, instruction set and assembler
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2025-06-19 01:57:36 +01:00 |
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zxq5
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e281bc2d1d
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IT WORKS HELL YEAH.
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2025-06-18 22:53:01 +01:00 |
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zxq5
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1210b19333
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asm done with parsing and linking. codegen all that's left
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2025-06-18 03:54:39 +01:00 |
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zxq5
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6a0b5c617a
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Merge remote-tracking branch 'refs/remotes/origin/main'
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2025-06-17 23:50:52 +01:00 |
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zxq5
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42847f7bfb
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merge commit
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2025-06-17 23:50:16 +01:00 |
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 nullndvoid
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687dea99ca
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emulator: get RPC working w/ Cargo features
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2025-06-17 23:48:28 +01:00 |
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zxq5
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b0670d1e6c
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assembler updates
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2025-06-17 23:48:06 +01:00 |
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nullndvoid
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3a40719e54
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misc: back to little endian because I am evil
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2025-06-17 19:51:16 +01:00 |
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nullndvoid
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0b16246dd2
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misc: applied some clippy lints
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2025-06-17 19:43:35 +01:00 |
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nullndvoid
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868cba376f
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misc: fix merge conflict
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2025-06-17 19:22:01 +01:00 |
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nullndvoid
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a6be668328
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emulator: just saving my changes
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2025-06-17 19:19:49 +01:00 |
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zxq5
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87fbd6c362
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assembler still very broken, dependency resolution works, now working on expanding pseudoinstructions
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2025-06-17 03:11:22 +01:00 |
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zxq5
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88a1c9f245
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Merge remote-tracking branch 'refs/remotes/origin/main'
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2025-06-16 23:40:29 +01:00 |
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zxq5
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9e0d014e99
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removed some useless code
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2025-06-16 23:39:05 +01:00 |
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zxq5
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75246f5e73
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editor go brr?
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2025-06-16 23:38:36 +01:00 |
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nullndvoid
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ae10249616
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misc: fixed some shit thanks to Clippy, have fun with the merge conflicts lmao
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2025-06-16 23:21:35 +01:00 |
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zxq5
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7d17107a8c
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Merge remote-tracking branch 'refs/remotes/origin/main'
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2025-06-16 03:50:25 +01:00 |
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zxq5
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e9eca34d48
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editor changes
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2025-06-16 03:49:08 +01:00 |
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zxq5
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7f834adbce
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assembler shenanigans. shiny ahh code.
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2025-06-16 03:48:31 +01:00 |
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nullndvoid
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5ed0f9c1ca
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misc: formatting and clippy lint fixes
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2025-06-16 01:19:57 +01:00 |
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zxq5
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2b5ad0885b
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added assembler skeleton code
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2025-06-15 21:53:57 +01:00 |
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zxq5
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2b8281157e
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refactor 2 electric boogaloo
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2025-06-15 21:40:43 +01:00 |
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zxq5
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277f210b3e
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editor works
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2025-06-15 21:21:02 +01:00 |
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zxq5
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5d1ea86cdd
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fixed a deadlock
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2025-06-15 16:51:20 +01:00 |
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nullndvoid
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aca73589de
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misc: IO is probably ok written in caps
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2025-06-15 16:26:02 +01:00 |
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nullndvoid
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dc196cf2d8
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common: add decoding tests, 52/52 passing :)
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2025-06-15 16:22:43 +01:00 |
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nullndvoid
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bffdf8c7bc
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common: use prelude in all files
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2025-06-15 16:02:46 +01:00 |
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nullndvoid
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423d768e40
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emulator: fix errors calling new fallible Instruction::decode
TODO: Add a logger for smarter looking loggiing output
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2025-06-15 15:53:58 +01:00 |
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nullndvoid
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ecf443e59e
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common: add instruction encoding tests, currently passing
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2025-06-15 14:16:45 +01:00 |
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nullndvoid
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977a621d5f
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common: instruction encoding via macro and trait ugly hack works
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2025-06-15 13:56:45 +01:00 |
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nullndvoid
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4e1d4d784f
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processor: module and test in same folder
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2025-06-15 13:01:31 +01:00 |
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nullndvoid
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3aa5d33f68
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processor: fix Flags to be bit flags and add test module
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2025-06-15 12:58:08 +01:00 |
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nullndvoid
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300c455efd
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common: fix clippy errors and test arguments
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2025-06-15 12:28:13 +01:00 |
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nullndvoid
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c837876960
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common: update processor code to use new arg structs
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2025-06-15 12:21:35 +01:00 |
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nullndvoid
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e52093f9cd
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common: update Instruction tuples to hold common structs
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2025-06-15 11:58:03 +01:00 |
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nullndvoid
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5494ff5803
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common: start writing encoding routines (todo!)
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2025-06-15 05:03:25 +01:00 |
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nullndvoid
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e55a1fced5
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common: add tests and opcode method
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2025-06-15 04:36:06 +01:00 |
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nullndvoid
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3c493d93fa
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misc: force vscode to format on save
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2025-06-15 04:04:24 +01:00 |
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nullndvoid
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a240346a84
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emulator: applied some clippy lints
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2025-06-15 04:03:48 +01:00 |
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zxq5
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a16f57c737
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cargo fmt
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2025-06-15 03:10:18 +01:00 |
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zxq5
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17fed069c5
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wrote a println example in .dsa
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2025-06-15 03:05:41 +01:00 |
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zxq5
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53ed41c077
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CPU can now decode instructions, just waiting on the assembler
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2025-06-15 02:34:23 +01:00 |
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zxq5
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4e9cc2849e
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working emulator UI - just need to implement the instruction set
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2025-06-15 00:39:08 +01:00 |
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zxq5
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68c8da4271
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written up instruction set
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2025-06-14 03:09:30 +01:00 |
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