Commit Graph

23 Commits

Author SHA1 Message Date
nullndvoid 5ed0f9c1ca misc: formatting and clippy lint fixes 2025-06-16 01:19:57 +01:00
zxq5 2b8281157e refactor 2 electric boogaloo 2025-06-15 21:40:43 +01:00
zxq5 277f210b3e editor works 2025-06-15 21:21:02 +01:00
zxq5 5d1ea86cdd fixed a deadlock 2025-06-15 16:51:20 +01:00
nullndvoid aca73589de misc: IO is probably ok written in caps 2025-06-15 16:26:02 +01:00
nullndvoid dc196cf2d8 common: add decoding tests, 52/52 passing :) 2025-06-15 16:22:43 +01:00
nullndvoid bffdf8c7bc common: use prelude in all files 2025-06-15 16:02:46 +01:00
nullndvoid 423d768e40 emulator: fix errors calling new fallible Instruction::decode
TODO: Add a logger for smarter looking loggiing output
2025-06-15 15:53:58 +01:00
nullndvoid ecf443e59e common: add instruction encoding tests, currently passing 2025-06-15 14:16:45 +01:00
nullndvoid 977a621d5f common: instruction encoding via macro and trait ugly hack works 2025-06-15 13:56:45 +01:00
nullndvoid 4e1d4d784f processor: module and test in same folder 2025-06-15 13:01:31 +01:00
nullndvoid 3aa5d33f68 processor: fix Flags to be bit flags and add test module 2025-06-15 12:58:08 +01:00
nullndvoid 300c455efd common: fix clippy errors and test arguments 2025-06-15 12:28:13 +01:00
nullndvoid c837876960 common: update processor code to use new arg structs 2025-06-15 12:21:35 +01:00
nullndvoid e52093f9cd common: update Instruction tuples to hold common structs 2025-06-15 11:58:03 +01:00
nullndvoid 5494ff5803 common: start writing encoding routines (todo!) 2025-06-15 05:03:25 +01:00
nullndvoid e55a1fced5 common: add tests and opcode method 2025-06-15 04:36:06 +01:00
nullndvoid a240346a84 emulator: applied some clippy lints 2025-06-15 04:03:48 +01:00
zxq5 a16f57c737 cargo fmt 2025-06-15 03:10:18 +01:00
zxq5 17fed069c5 wrote a println example in .dsa 2025-06-15 03:05:41 +01:00
zxq5 53ed41c077 CPU can now decode instructions, just waiting on the assembler 2025-06-15 02:34:23 +01:00
zxq5 4e9cc2849e working emulator UI - just need to implement the instruction set 2025-06-15 00:39:08 +01:00
zxq5 68c8da4271 written up instruction set 2025-06-14 03:09:30 +01:00