fixed unit tests & misc changes to workspace config
This commit is contained in:
Vendored
+2
@@ -6,4 +6,6 @@
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"files.insertFinalNewline": true,
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"files.insertFinalNewline": true,
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"files.trimFinalNewlines": true,
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"files.trimFinalNewlines": true,
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"files.trimTrailingWhitespace": true,
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"files.trimTrailingWhitespace": true,
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"gitea.owner": "LowLevelDevs",
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"gitea.repo": "damn_simple_architecture",
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}
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}
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@@ -1,7 +1,6 @@
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//! Macros used throughout the assembler
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//! Macros used throughout the assembler
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use crate::assembler::model::{Node, Opcode, Symbol, Token};
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use crate::assembler::model::{Node, Opcode, Symbol, Token};
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/// Parse DSA assembly code with optional formatting
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/// Parse DSA assembly code with optional formatting
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///
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///
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/// # Examples
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/// # Examples
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@@ -18,19 +18,27 @@ fn test_nop_instruction() {
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);
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);
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assert_eq!(
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assert_eq!(
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cpu.registers.get(Register::Rg0),
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cpu.registers
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initial_state.get(Register::Rg0)
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.get(Register::Rg0)
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.expect("Failed to get register Rg0"),
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initial_state
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.get(Register::Rg0)
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.expect("Failed to get register Rg0")
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);
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);
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assert_eq!(
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assert_eq!(
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cpu.registers.get(Register::Acc),
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cpu.registers
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initial_state.get(Register::Acc)
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.get(Register::Acc)
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.expect("Failed to get register Acc"),
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initial_state
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.get(Register::Acc)
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.expect("Failed to get register Acc")
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);
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);
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}
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}
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#[test]
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#[test]
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fn test_mov_instruction() {
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fn test_mov_instruction() {
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let mut cpu = create_test_processor();
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let mut cpu = create_test_processor();
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*cpu.reg(Register::Rg1) = 0x1234_5678;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1234_5678;
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let mov_instr = Instruction::Mov(RTypeArgs::new(
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let mov_instr = Instruction::Mov(RTypeArgs::new(
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Some(Register::Rg1),
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Some(Register::Rg1),
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@@ -42,13 +50,16 @@ fn test_mov_instruction() {
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mov_instr.execute(&mut cpu).expect(
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mov_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0x1234_5678);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0x1234_5678
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);
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}
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}
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#[test]
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#[test]
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fn test_mov_signed_instruction() {
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fn test_mov_signed_instruction() {
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let mut cpu = create_test_processor();
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let mut cpu = create_test_processor();
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*cpu.reg(Register::Rg1) = 0x0000_00FF;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0000_00FF;
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let mov_signed_instr = Instruction::MovSigned(RTypeArgs::new(
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let mov_signed_instr = Instruction::MovSigned(RTypeArgs::new(
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Some(Register::Rg1),
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Some(Register::Rg1),
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@@ -60,7 +71,10 @@ fn test_mov_signed_instruction() {
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mov_signed_instr.execute(&mut cpu).expect(
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mov_signed_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0xFFFF_FFFF);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0xFFFF_FFFF
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);
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}
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}
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#[test]
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#[test]
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@@ -70,7 +84,7 @@ fn test_load_byte_instruction() {
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cpu.memory
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cpu.memory
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.write_byte(addr, 0xAB)
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.write_byte(addr, 0xAB)
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.expect("Failed to write byte to memory");
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.expect("Failed to write byte to memory");
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*cpu.reg(Register::Rg1) = addr - 4;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr - 4;
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let load_byte_instr = Instruction::LoadByte(ITypeArgs::new(
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let load_byte_instr = Instruction::LoadByte(ITypeArgs::new(
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4,
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4,
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@@ -81,7 +95,10 @@ fn test_load_byte_instruction() {
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load_byte_instr.execute(&mut cpu).expect(
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load_byte_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0x0000_00AB);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0x0000_00AB
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);
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}
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}
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#[test]
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#[test]
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@@ -91,7 +108,7 @@ fn test_load_byte_signed_instruction() {
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cpu.memory
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cpu.memory
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.write_byte(addr, 0xFF)
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.write_byte(addr, 0xFF)
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.expect("Failed to write byte to memory");
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.expect("Failed to write byte to memory");
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*cpu.reg(Register::Rg1) = addr;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
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let load_byte_signed_instr = Instruction::LoadByteSigned(ITypeArgs::new(
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let load_byte_signed_instr = Instruction::LoadByteSigned(ITypeArgs::new(
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0,
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0,
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@@ -102,7 +119,10 @@ fn test_load_byte_signed_instruction() {
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load_byte_signed_instr.execute(&mut cpu).expect(
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load_byte_signed_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0xFFFF_FFFF);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0xFFFF_FFFF
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);
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}
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}
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#[test]
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#[test]
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@@ -112,7 +132,7 @@ fn test_load_halfword_instruction() {
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cpu.memory
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cpu.memory
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.write_word(addr, 0x1234_5678)
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.write_word(addr, 0x1234_5678)
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.expect("Failed to write word to memory");
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.expect("Failed to write word to memory");
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*cpu.reg(Register::Rg1) = addr;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
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let load_halfword_instr = Instruction::LoadHalfword(ITypeArgs::new(
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let load_halfword_instr = Instruction::LoadHalfword(ITypeArgs::new(
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0,
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0,
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@@ -123,7 +143,10 @@ fn test_load_halfword_instruction() {
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load_halfword_instr.execute(&mut cpu).expect(
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load_halfword_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0x0000_1234);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0x0000_1234
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);
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}
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}
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#[test]
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#[test]
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@@ -133,7 +156,7 @@ fn test_load_word_instruction() {
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cpu.memory
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cpu.memory
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.write_word(addr, 0x1234_5678)
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.write_word(addr, 0x1234_5678)
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.expect("Failed to write word to memory");
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.expect("Failed to write word to memory");
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*cpu.reg(Register::Rg1) = addr;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
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let load_word_instr = Instruction::LoadWord(ITypeArgs::new(
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let load_word_instr = Instruction::LoadWord(ITypeArgs::new(
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0,
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0,
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@@ -144,15 +167,18 @@ fn test_load_word_instruction() {
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load_word_instr.execute(&mut cpu).expect(
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load_word_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
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"Emulator was slain by losing the game while attempting to execute instruction",
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);
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);
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assert_eq!(cpu.get(Register::Rg2), 0x1234_5678);
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assert_eq!(
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cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
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0x1234_5678
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);
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}
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}
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#[test]
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#[test]
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fn test_store_byte_instruction() {
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fn test_store_byte_instruction() {
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let mut cpu = create_test_processor();
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let mut cpu = create_test_processor();
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let addr = 0x100;
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let addr = 0x100;
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*cpu.reg(Register::Rg1) = addr;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
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*cpu.reg(Register::Rg2) = 0xAB;
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*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0xAB;
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let store_byte_instr = Instruction::StoreByte(ITypeArgs::new(
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let store_byte_instr = Instruction::StoreByte(ITypeArgs::new(
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0,
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0,
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@@ -170,8 +196,8 @@ fn test_store_byte_instruction() {
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fn test_store_word_instruction() {
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fn test_store_word_instruction() {
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let mut cpu = create_test_processor();
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let mut cpu = create_test_processor();
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let addr = 0x100;
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let addr = 0x100;
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*cpu.reg(Register::Rg1) = addr;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
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*cpu.reg(Register::Rg2) = 0x1234_5678;
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*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0x1234_5678;
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|
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let store_word_instr = Instruction::StoreWord(ITypeArgs::new(
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let store_word_instr = Instruction::StoreWord(ITypeArgs::new(
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0,
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0,
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@@ -188,8 +214,8 @@ fn test_store_word_instruction() {
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#[test]
|
#[test]
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fn test_add_instruction() {
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fn test_add_instruction() {
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let mut cpu = create_test_processor();
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let mut cpu = create_test_processor();
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*cpu.reg(Register::Rg1) = 15;
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*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 15;
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*cpu.reg(Register::Rg2) = 25;
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*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 25;
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|
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let add_instr = Instruction::Add(RTypeArgs::new(
|
let add_instr = Instruction::Add(RTypeArgs::new(
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Some(Register::Rg1),
|
Some(Register::Rg1),
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@@ -201,14 +227,17 @@ fn test_add_instruction() {
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add_instr.execute(&mut cpu).expect(
|
add_instr.execute(&mut cpu).expect(
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"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
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);
|
);
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assert_eq!(cpu.get(Register::Rg3), 40);
|
assert_eq!(
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|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
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|
40
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|
);
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}
|
}
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|
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#[test]
|
#[test]
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fn test_sub_instruction() {
|
fn test_sub_instruction() {
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let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
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*cpu.reg(Register::Rg1) = 50;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 50;
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*cpu.reg(Register::Rg2) = 20;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 20;
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|
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let sub_instr = Instruction::Sub(RTypeArgs::new(
|
let sub_instr = Instruction::Sub(RTypeArgs::new(
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Some(Register::Rg1),
|
Some(Register::Rg1),
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||||||
@@ -220,14 +249,17 @@ fn test_sub_instruction() {
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sub_instr.execute(&mut cpu).expect(
|
sub_instr.execute(&mut cpu).expect(
|
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"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
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assert_eq!(cpu.get(Register::Rg3), 30);
|
assert_eq!(
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|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
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|
30
|
||||||
|
);
|
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}
|
}
|
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|
|
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#[test]
|
#[test]
|
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fn test_and_instruction() {
|
fn test_and_instruction() {
|
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let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
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*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
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*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let and_instr = Instruction::And(RTypeArgs::new(
|
let and_instr = Instruction::And(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -239,14 +271,17 @@ fn test_and_instruction() {
|
|||||||
and_instr.execute(&mut cpu).expect(
|
and_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), 0b1000);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
0b1000
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_or_instruction() {
|
fn test_or_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
||||||
*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let or_instr = Instruction::Or(RTypeArgs::new(
|
let or_instr = Instruction::Or(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -258,14 +293,17 @@ fn test_or_instruction() {
|
|||||||
or_instr.execute(&mut cpu).expect(
|
or_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), 0b1110);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
0b1110
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_xor_instruction() {
|
fn test_xor_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
||||||
*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let xor_instr = Instruction::Xor(RTypeArgs::new(
|
let xor_instr = Instruction::Xor(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -277,13 +315,16 @@ fn test_xor_instruction() {
|
|||||||
xor_instr.execute(&mut cpu).expect(
|
xor_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), 0b0110);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
0b0110
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_not_instruction() {
|
fn test_not_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0x0F0F_0F0F;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0F0F_0F0F;
|
||||||
|
|
||||||
let not_instr = Instruction::Not(RTypeArgs::new(
|
let not_instr = Instruction::Not(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -295,14 +336,17 @@ fn test_not_instruction() {
|
|||||||
not_instr.execute(&mut cpu).expect(
|
not_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg2), 0xF0F0_F0F0);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
|
||||||
|
0xF0F0_F0F0
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_compare_equal() {
|
fn test_compare_equal() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 42;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
|
||||||
*cpu.reg(Register::Rg2) = 42;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 42;
|
||||||
|
|
||||||
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -315,16 +359,22 @@ fn test_compare_equal() {
|
|||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
|
|
||||||
assert!(cpu.get_flag(Flag::Equal));
|
assert!(cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
|
||||||
assert!(!cpu.get_flag(Flag::GreaterThan));
|
assert!(
|
||||||
assert!(!cpu.get_flag(Flag::LessThan));
|
!cpu.get_flag(Flag::GreaterThan)
|
||||||
|
.expect("Failed to get flag GreaterThan")
|
||||||
|
);
|
||||||
|
assert!(
|
||||||
|
!cpu.get_flag(Flag::LessThan)
|
||||||
|
.expect("Failed to get flag LessThan")
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_compare_greater_than() {
|
fn test_compare_greater_than() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 50;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 50;
|
||||||
*cpu.reg(Register::Rg2) = 30;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 30;
|
||||||
|
|
||||||
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -337,16 +387,22 @@ fn test_compare_greater_than() {
|
|||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
|
|
||||||
assert!(!cpu.get_flag(Flag::Equal));
|
assert!(!cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
|
||||||
assert!(cpu.get_flag(Flag::GreaterThan));
|
assert!(
|
||||||
assert!(!cpu.get_flag(Flag::LessThan));
|
cpu.get_flag(Flag::GreaterThan)
|
||||||
|
.expect("Failed to get flag GreaterThan")
|
||||||
|
);
|
||||||
|
assert!(
|
||||||
|
!cpu.get_flag(Flag::LessThan)
|
||||||
|
.expect("Failed to get flag LessThan")
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_compare_less_than() {
|
fn test_compare_less_than() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 20;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 20;
|
||||||
*cpu.reg(Register::Rg2) = 30;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 30;
|
||||||
|
|
||||||
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
let cmp_instr = Instruction::Compare(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -359,15 +415,21 @@ fn test_compare_less_than() {
|
|||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
|
|
||||||
assert!(!cpu.get_flag(Flag::Equal));
|
assert!(!cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
|
||||||
assert!(!cpu.get_flag(Flag::GreaterThan));
|
assert!(
|
||||||
assert!(cpu.get_flag(Flag::LessThan));
|
!cpu.get_flag(Flag::GreaterThan)
|
||||||
|
.expect("Failed to get flag GreaterThan")
|
||||||
|
);
|
||||||
|
assert!(
|
||||||
|
cpu.get_flag(Flag::LessThan)
|
||||||
|
.expect("Failed to get flag LessThan")
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_increment_instruction() {
|
fn test_increment_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 42;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
|
||||||
|
|
||||||
let inc_instr =
|
let inc_instr =
|
||||||
Instruction::Increment(RTypeArgs::new(Some(Register::Rg1), None, None, None));
|
Instruction::Increment(RTypeArgs::new(Some(Register::Rg1), None, None, None));
|
||||||
@@ -375,13 +437,16 @@ fn test_increment_instruction() {
|
|||||||
inc_instr.execute(&mut cpu).expect(
|
inc_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 43);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
43
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_decrement_instruction() {
|
fn test_decrement_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 42;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
|
||||||
|
|
||||||
let dec_instr =
|
let dec_instr =
|
||||||
Instruction::Decrement(RTypeArgs::new(Some(Register::Rg1), None, None, None));
|
Instruction::Decrement(RTypeArgs::new(Some(Register::Rg1), None, None, None));
|
||||||
@@ -389,13 +454,16 @@ fn test_decrement_instruction() {
|
|||||||
dec_instr.execute(&mut cpu).expect(
|
dec_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 41);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
41
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_shift_left_with_shamt() {
|
fn test_shift_left_with_shamt() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1010;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1010;
|
||||||
|
|
||||||
let shl_instr = Instruction::ShiftLeft(RTypeArgs::new(
|
let shl_instr = Instruction::ShiftLeft(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -407,13 +475,16 @@ fn test_shift_left_with_shamt() {
|
|||||||
shl_instr.execute(&mut cpu).expect(
|
shl_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 0b10_1000);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
0b10_1000
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_shift_right_with_shamt() {
|
fn test_shift_right_with_shamt() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b10_1000;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b10_1000;
|
||||||
|
|
||||||
let shr_instr = Instruction::ShiftRight(RTypeArgs::new(
|
let shr_instr = Instruction::ShiftRight(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -425,28 +496,30 @@ fn test_shift_right_with_shamt() {
|
|||||||
shr_instr.execute(&mut cpu).expect(
|
shr_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 0b1010);
|
assert_eq!(
|
||||||
}
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
0b1010
|
||||||
#[test]
|
|
||||||
fn test_shift_left_with_register() {
|
|
||||||
let mut cpu = create_test_processor();
|
|
||||||
*cpu.reg(Register::Rg1) = 0b1010;
|
|
||||||
*cpu.reg(Register::Rg2) = 3;
|
|
||||||
|
|
||||||
let shl_instr = Instruction::ShiftLeft(RTypeArgs::new(
|
|
||||||
Some(Register::Rg1),
|
|
||||||
Some(Register::Rg2),
|
|
||||||
None,
|
|
||||||
None,
|
|
||||||
));
|
|
||||||
|
|
||||||
shl_instr.execute(&mut cpu).expect(
|
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 0b101_0000);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// #[test]
|
||||||
|
// fn test_shift_left_with_register() {
|
||||||
|
// let mut cpu = create_test_processor();
|
||||||
|
// *cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1010;
|
||||||
|
|
||||||
|
// let shl_instr =
|
||||||
|
// Instruction::ShiftLeft(RTypeArgs::new(Some(Register::Rg1), None, None,
|
||||||
|
// Some(3)));
|
||||||
|
|
||||||
|
// shl_instr.execute(&mut cpu).expect(
|
||||||
|
// "Emulator was slain by losing the game while attempting to execute
|
||||||
|
// instruction", );
|
||||||
|
// assert_eq!(
|
||||||
|
// cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
// 0b101_0000
|
||||||
|
// );
|
||||||
|
// }
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_load_lower_immediate() {
|
fn test_load_lower_immediate() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
@@ -460,13 +533,16 @@ fn test_load_lower_immediate() {
|
|||||||
lli_instr.execute(&mut cpu).expect(
|
lli_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 0x0000_1234);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
0x0000_1234
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_load_upper_immediate() {
|
fn test_load_upper_immediate() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0x0000_5678;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0000_5678;
|
||||||
|
|
||||||
let lui_instr = Instruction::LoadUpperImmediate(ITypeArgs::new(
|
let lui_instr = Instruction::LoadUpperImmediate(ITypeArgs::new(
|
||||||
0x1234,
|
0x1234,
|
||||||
@@ -477,29 +553,38 @@ fn test_load_upper_immediate() {
|
|||||||
lui_instr.execute(&mut cpu).expect(
|
lui_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg1), 0x1234_5678);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
|
||||||
|
0x1234_5678
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_jump_unconditional() {
|
fn test_jump_unconditional() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0x1000;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
|
||||||
let initial_pc = cpu.get(Register::Pcx);
|
let initial_pc = cpu.get(Register::Pcx).expect("Failed to get register Pcx");
|
||||||
|
|
||||||
let jump_instr = Instruction::Jump(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
let jump_instr = Instruction::Jump(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
||||||
|
|
||||||
jump_instr.execute(&mut cpu).expect(
|
jump_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Pcx), 0x1100);
|
assert_eq!(
|
||||||
assert_ne!(cpu.get(Register::Pcx), initial_pc);
|
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
|
||||||
|
0x1100
|
||||||
|
);
|
||||||
|
assert_ne!(
|
||||||
|
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
|
||||||
|
initial_pc
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_jump_equal_when_flag_set() {
|
fn test_jump_equal_when_flag_set() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
cpu.set_flag(Flag::Equal, true);
|
cpu.set_flag(Flag::Equal, true);
|
||||||
*cpu.reg(Register::Rg1) = 0x1000;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
|
||||||
|
|
||||||
let jump_eq_instr =
|
let jump_eq_instr =
|
||||||
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
||||||
@@ -507,15 +592,18 @@ fn test_jump_equal_when_flag_set() {
|
|||||||
jump_eq_instr.execute(&mut cpu).expect(
|
jump_eq_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Pcx), 0x1100);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
|
||||||
|
0x1100
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_jump_equal_when_flag_not_set() {
|
fn test_jump_equal_when_flag_not_set() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
cpu.set_flag(Flag::Equal, false);
|
cpu.set_flag(Flag::Equal, false);
|
||||||
*cpu.reg(Register::Rg1) = 0x1000;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
|
||||||
let initial_pc = cpu.get(Register::Pcx);
|
let initial_pc = cpu.get(Register::Pcx).expect("Failed to get register Pcx");
|
||||||
|
|
||||||
let jump_eq_instr =
|
let jump_eq_instr =
|
||||||
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
|
||||||
@@ -523,7 +611,10 @@ fn test_jump_equal_when_flag_not_set() {
|
|||||||
jump_eq_instr.execute(&mut cpu).expect(
|
jump_eq_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Pcx), initial_pc);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
|
||||||
|
initial_pc
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
@@ -540,8 +631,8 @@ fn test_halt_instruction() {
|
|||||||
#[test]
|
#[test]
|
||||||
fn test_nand_instruction() {
|
fn test_nand_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
||||||
*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let nand_instr = Instruction::Nand(RTypeArgs::new(
|
let nand_instr = Instruction::Nand(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -553,14 +644,17 @@ fn test_nand_instruction() {
|
|||||||
nand_instr.execute(&mut cpu).expect(
|
nand_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), !0b1000);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
!0b1000
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_nor_instruction() {
|
fn test_nor_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
||||||
*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let nor_instr = Instruction::Nor(RTypeArgs::new(
|
let nor_instr = Instruction::Nor(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -572,14 +666,17 @@ fn test_nor_instruction() {
|
|||||||
nor_instr.execute(&mut cpu).expect(
|
nor_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), !0b1110);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
!0b1110
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_xnor_instruction() {
|
fn test_xnor_instruction() {
|
||||||
let mut cpu = create_test_processor();
|
let mut cpu = create_test_processor();
|
||||||
*cpu.reg(Register::Rg1) = 0b1100;
|
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
|
||||||
*cpu.reg(Register::Rg2) = 0b1010;
|
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
|
||||||
|
|
||||||
let xnor_instr = Instruction::Xnor(RTypeArgs::new(
|
let xnor_instr = Instruction::Xnor(RTypeArgs::new(
|
||||||
Some(Register::Rg1),
|
Some(Register::Rg1),
|
||||||
@@ -591,5 +688,8 @@ fn test_xnor_instruction() {
|
|||||||
xnor_instr.execute(&mut cpu).expect(
|
xnor_instr.execute(&mut cpu).expect(
|
||||||
"Emulator was slain by losing the game while attempting to execute instruction",
|
"Emulator was slain by losing the game while attempting to execute instruction",
|
||||||
);
|
);
|
||||||
assert_eq!(cpu.get(Register::Rg3), !0b0110);
|
assert_eq!(
|
||||||
|
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
|
||||||
|
!0b0110
|
||||||
|
);
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user