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fixed unit tests & misc changes to workspace config

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This commit is contained in:
zxq5
2025-06-26 00:50:58 +01:00
parent 1101331f70
commit 620584488b
3 changed files with 201 additions and 100 deletions
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.vscode/settings.json
Vendored
+2
View File
@@ -6,4 +6,6 @@
"files.insertFinalNewline": true,
"files.trimFinalNewlines": true,
"files.trimTrailingWhitespace": true,
"gitea.owner": "LowLevelDevs",
"gitea.repo": "damn_simple_architecture",
}
assembler/src/assembler/macros.rs
-1
View File
@@ -1,7 +1,6 @@
//! Macros used throughout the assembler
use crate::assembler::model::{Node, Opcode, Symbol, Token};
/// Parse DSA assembly code with optional formatting
///
/// # Examples
emulator/src/emulator/system/processor/tests.rs
+199 -99
View File
@@ -18,19 +18,27 @@ fn test_nop_instruction() {
);
assert_eq!(
cpu.registers.get(Register::Rg0),
initial_state.get(Register::Rg0)
cpu.registers
.get(Register::Rg0)
.expect("Failed to get register Rg0"),
initial_state
.get(Register::Rg0)
.expect("Failed to get register Rg0")
);
assert_eq!(
cpu.registers.get(Register::Acc),
initial_state.get(Register::Acc)
cpu.registers
.get(Register::Acc)
.expect("Failed to get register Acc"),
initial_state
.get(Register::Acc)
.expect("Failed to get register Acc")
);
}
#[test]
fn test_mov_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0x1234_5678;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1234_5678;
let mov_instr = Instruction::Mov(RTypeArgs::new(
Some(Register::Rg1),
@@ -42,13 +50,16 @@ fn test_mov_instruction() {
mov_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0x1234_5678);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0x1234_5678
);
}
#[test]
fn test_mov_signed_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0x0000_00FF;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0000_00FF;
let mov_signed_instr = Instruction::MovSigned(RTypeArgs::new(
Some(Register::Rg1),
@@ -60,7 +71,10 @@ fn test_mov_signed_instruction() {
mov_signed_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0xFFFF_FFFF);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0xFFFF_FFFF
);
}
#[test]
@@ -70,7 +84,7 @@ fn test_load_byte_instruction() {
cpu.memory
.write_byte(addr, 0xAB)
.expect("Failed to write byte to memory");
*cpu.reg(Register::Rg1) = addr - 4;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr - 4;
let load_byte_instr = Instruction::LoadByte(ITypeArgs::new(
4,
@@ -81,7 +95,10 @@ fn test_load_byte_instruction() {
load_byte_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0x0000_00AB);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0x0000_00AB
);
}
#[test]
@@ -91,7 +108,7 @@ fn test_load_byte_signed_instruction() {
cpu.memory
.write_byte(addr, 0xFF)
.expect("Failed to write byte to memory");
*cpu.reg(Register::Rg1) = addr;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
let load_byte_signed_instr = Instruction::LoadByteSigned(ITypeArgs::new(
0,
@@ -102,7 +119,10 @@ fn test_load_byte_signed_instruction() {
load_byte_signed_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0xFFFF_FFFF);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0xFFFF_FFFF
);
}
#[test]
@@ -112,7 +132,7 @@ fn test_load_halfword_instruction() {
cpu.memory
.write_word(addr, 0x1234_5678)
.expect("Failed to write word to memory");
*cpu.reg(Register::Rg1) = addr;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
let load_halfword_instr = Instruction::LoadHalfword(ITypeArgs::new(
0,
@@ -123,7 +143,10 @@ fn test_load_halfword_instruction() {
load_halfword_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0x0000_1234);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0x0000_1234
);
}
#[test]
@@ -133,7 +156,7 @@ fn test_load_word_instruction() {
cpu.memory
.write_word(addr, 0x1234_5678)
.expect("Failed to write word to memory");
*cpu.reg(Register::Rg1) = addr;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
let load_word_instr = Instruction::LoadWord(ITypeArgs::new(
0,
@@ -144,15 +167,18 @@ fn test_load_word_instruction() {
load_word_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0x1234_5678);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0x1234_5678
);
}
#[test]
fn test_store_byte_instruction() {
let mut cpu = create_test_processor();
let addr = 0x100;
*cpu.reg(Register::Rg1) = addr;
*cpu.reg(Register::Rg2) = 0xAB;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0xAB;
let store_byte_instr = Instruction::StoreByte(ITypeArgs::new(
0,
@@ -170,8 +196,8 @@ fn test_store_byte_instruction() {
fn test_store_word_instruction() {
let mut cpu = create_test_processor();
let addr = 0x100;
*cpu.reg(Register::Rg1) = addr;
*cpu.reg(Register::Rg2) = 0x1234_5678;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = addr;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0x1234_5678;
let store_word_instr = Instruction::StoreWord(ITypeArgs::new(
0,
@@ -188,8 +214,8 @@ fn test_store_word_instruction() {
#[test]
fn test_add_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 15;
*cpu.reg(Register::Rg2) = 25;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 15;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 25;
let add_instr = Instruction::Add(RTypeArgs::new(
Some(Register::Rg1),
@@ -201,14 +227,17 @@ fn test_add_instruction() {
add_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), 40);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
40
);
}
#[test]
fn test_sub_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 50;
*cpu.reg(Register::Rg2) = 20;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 50;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 20;
let sub_instr = Instruction::Sub(RTypeArgs::new(
Some(Register::Rg1),
@@ -220,14 +249,17 @@ fn test_sub_instruction() {
sub_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), 30);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
30
);
}
#[test]
fn test_and_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let and_instr = Instruction::And(RTypeArgs::new(
Some(Register::Rg1),
@@ -239,14 +271,17 @@ fn test_and_instruction() {
and_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), 0b1000);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
0b1000
);
}
#[test]
fn test_or_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let or_instr = Instruction::Or(RTypeArgs::new(
Some(Register::Rg1),
@@ -258,14 +293,17 @@ fn test_or_instruction() {
or_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), 0b1110);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
0b1110
);
}
#[test]
fn test_xor_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let xor_instr = Instruction::Xor(RTypeArgs::new(
Some(Register::Rg1),
@@ -277,13 +315,16 @@ fn test_xor_instruction() {
xor_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), 0b0110);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
0b0110
);
}
#[test]
fn test_not_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0x0F0F_0F0F;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0F0F_0F0F;
let not_instr = Instruction::Not(RTypeArgs::new(
Some(Register::Rg1),
@@ -295,14 +336,17 @@ fn test_not_instruction() {
not_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg2), 0xF0F0_F0F0);
assert_eq!(
cpu.get(Register::Rg2).expect("Failed to get register Rg2"),
0xF0F0_F0F0
);
}
#[test]
fn test_compare_equal() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 42;
*cpu.reg(Register::Rg2) = 42;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 42;
let cmp_instr = Instruction::Compare(RTypeArgs::new(
Some(Register::Rg1),
@@ -315,16 +359,22 @@ fn test_compare_equal() {
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert!(cpu.get_flag(Flag::Equal));
assert!(!cpu.get_flag(Flag::GreaterThan));
assert!(!cpu.get_flag(Flag::LessThan));
assert!(cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
assert!(
!cpu.get_flag(Flag::GreaterThan)
.expect("Failed to get flag GreaterThan")
);
assert!(
!cpu.get_flag(Flag::LessThan)
.expect("Failed to get flag LessThan")
);
}
#[test]
fn test_compare_greater_than() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 50;
*cpu.reg(Register::Rg2) = 30;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 50;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 30;
let cmp_instr = Instruction::Compare(RTypeArgs::new(
Some(Register::Rg1),
@@ -337,16 +387,22 @@ fn test_compare_greater_than() {
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert!(!cpu.get_flag(Flag::Equal));
assert!(cpu.get_flag(Flag::GreaterThan));
assert!(!cpu.get_flag(Flag::LessThan));
assert!(!cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
assert!(
cpu.get_flag(Flag::GreaterThan)
.expect("Failed to get flag GreaterThan")
);
assert!(
!cpu.get_flag(Flag::LessThan)
.expect("Failed to get flag LessThan")
);
}
#[test]
fn test_compare_less_than() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 20;
*cpu.reg(Register::Rg2) = 30;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 20;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 30;
let cmp_instr = Instruction::Compare(RTypeArgs::new(
Some(Register::Rg1),
@@ -359,15 +415,21 @@ fn test_compare_less_than() {
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert!(!cpu.get_flag(Flag::Equal));
assert!(!cpu.get_flag(Flag::GreaterThan));
assert!(cpu.get_flag(Flag::LessThan));
assert!(!cpu.get_flag(Flag::Equal).expect("Failed to get flag Equal"));
assert!(
!cpu.get_flag(Flag::GreaterThan)
.expect("Failed to get flag GreaterThan")
);
assert!(
cpu.get_flag(Flag::LessThan)
.expect("Failed to get flag LessThan")
);
}
#[test]
fn test_increment_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 42;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
let inc_instr =
Instruction::Increment(RTypeArgs::new(Some(Register::Rg1), None, None, None));
@@ -375,13 +437,16 @@ fn test_increment_instruction() {
inc_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 43);
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
43
);
}
#[test]
fn test_decrement_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 42;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 42;
let dec_instr =
Instruction::Decrement(RTypeArgs::new(Some(Register::Rg1), None, None, None));
@@ -389,13 +454,16 @@ fn test_decrement_instruction() {
dec_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 41);
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
41
);
}
#[test]
fn test_shift_left_with_shamt() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1010;
let shl_instr = Instruction::ShiftLeft(RTypeArgs::new(
Some(Register::Rg1),
@@ -407,13 +475,16 @@ fn test_shift_left_with_shamt() {
shl_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 0b10_1000);
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
0b10_1000
);
}
#[test]
fn test_shift_right_with_shamt() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b10_1000;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b10_1000;
let shr_instr = Instruction::ShiftRight(RTypeArgs::new(
Some(Register::Rg1),
@@ -425,28 +496,30 @@ fn test_shift_right_with_shamt() {
shr_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 0b1010);
}
#[test]
fn test_shift_left_with_register() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1010;
*cpu.reg(Register::Rg2) = 3;
let shl_instr = Instruction::ShiftLeft(RTypeArgs::new(
Some(Register::Rg1),
Some(Register::Rg2),
None,
None,
));
shl_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
0b1010
);
assert_eq!(cpu.get(Register::Rg1), 0b101_0000);
}
// #[test]
// fn test_shift_left_with_register() {
// let mut cpu = create_test_processor();
// *cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1010;
// let shl_instr =
// Instruction::ShiftLeft(RTypeArgs::new(Some(Register::Rg1), None, None,
// Some(3)));
// shl_instr.execute(&mut cpu).expect(
// "Emulator was slain by losing the game while attempting to execute
// instruction", );
// assert_eq!(
// cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
// 0b101_0000
// );
// }
#[test]
fn test_load_lower_immediate() {
let mut cpu = create_test_processor();
@@ -460,13 +533,16 @@ fn test_load_lower_immediate() {
lli_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 0x0000_1234);
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
0x0000_1234
);
}
#[test]
fn test_load_upper_immediate() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0x0000_5678;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x0000_5678;
let lui_instr = Instruction::LoadUpperImmediate(ITypeArgs::new(
0x1234,
@@ -477,29 +553,38 @@ fn test_load_upper_immediate() {
lui_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg1), 0x1234_5678);
assert_eq!(
cpu.get(Register::Rg1).expect("Failed to get register Rg1"),
0x1234_5678
);
}
#[test]
fn test_jump_unconditional() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0x1000;
let initial_pc = cpu.get(Register::Pcx);
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
let initial_pc = cpu.get(Register::Pcx).expect("Failed to get register Pcx");
let jump_instr = Instruction::Jump(ITypeArgs::new(0x100, Some(Register::Rg1), None));
jump_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Pcx), 0x1100);
assert_ne!(cpu.get(Register::Pcx), initial_pc);
assert_eq!(
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
0x1100
);
assert_ne!(
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
initial_pc
);
}
#[test]
fn test_jump_equal_when_flag_set() {
let mut cpu = create_test_processor();
cpu.set_flag(Flag::Equal, true);
*cpu.reg(Register::Rg1) = 0x1000;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
let jump_eq_instr =
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
@@ -507,15 +592,18 @@ fn test_jump_equal_when_flag_set() {
jump_eq_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Pcx), 0x1100);
assert_eq!(
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
0x1100
);
}
#[test]
fn test_jump_equal_when_flag_not_set() {
let mut cpu = create_test_processor();
cpu.set_flag(Flag::Equal, false);
*cpu.reg(Register::Rg1) = 0x1000;
let initial_pc = cpu.get(Register::Pcx);
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0x1000;
let initial_pc = cpu.get(Register::Pcx).expect("Failed to get register Pcx");
let jump_eq_instr =
Instruction::JumpEq(ITypeArgs::new(0x100, Some(Register::Rg1), None));
@@ -523,7 +611,10 @@ fn test_jump_equal_when_flag_not_set() {
jump_eq_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Pcx), initial_pc);
assert_eq!(
cpu.get(Register::Pcx).expect("Failed to get register Pcx"),
initial_pc
);
}
#[test]
@@ -540,8 +631,8 @@ fn test_halt_instruction() {
#[test]
fn test_nand_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let nand_instr = Instruction::Nand(RTypeArgs::new(
Some(Register::Rg1),
@@ -553,14 +644,17 @@ fn test_nand_instruction() {
nand_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), !0b1000);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
!0b1000
);
}
#[test]
fn test_nor_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let nor_instr = Instruction::Nor(RTypeArgs::new(
Some(Register::Rg1),
@@ -572,14 +666,17 @@ fn test_nor_instruction() {
nor_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), !0b1110);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
!0b1110
);
}
#[test]
fn test_xnor_instruction() {
let mut cpu = create_test_processor();
*cpu.reg(Register::Rg1) = 0b1100;
*cpu.reg(Register::Rg2) = 0b1010;
*cpu.reg(Register::Rg1).expect("Failed to get register Rg1") = 0b1100;
*cpu.reg(Register::Rg2).expect("Failed to get register Rg2") = 0b1010;
let xnor_instr = Instruction::Xnor(RTypeArgs::new(
Some(Register::Rg1),
@@ -591,5 +688,8 @@ fn test_xnor_instruction() {
xnor_instr.execute(&mut cpu).expect(
"Emulator was slain by losing the game while attempting to execute instruction",
);
assert_eq!(cpu.get(Register::Rg3), !0b0110);
assert_eq!(
cpu.get(Register::Rg3).expect("Failed to get register Rg3"),
!0b0110
);
}