66 lines
1.3 KiB
Rust
66 lines
1.3 KiB
Rust
use serde::{Deserialize, Serialize};
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use crate::memory::mmu::MMU;
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mod cache;
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pub mod mainstore;
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pub mod mmu;
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mod tlb;
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pub type VirtAddr = u32;
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pub type PhysAddr = u32;
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pub enum FaultInfo {
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PageFault,
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}
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#[repr(u32)]
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#[derive(Serialize, Deserialize, Clone, Copy)]
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enum RegionType {
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Reserved,
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Bootloader,
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Kernel,
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KernelTables,
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Usable,
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MMIO,
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}
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#[derive(Serialize, Deserialize, Clone, Copy)]
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pub struct Region {
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base: PhysAddr,
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size: usize,
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region_type: RegionType,
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}
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#[derive(Serialize, Deserialize)]
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pub struct MemoryMap {
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table_addr: PhysAddr,
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pub regions: Vec<Region>,
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}
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impl MemoryMap {
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pub const DEFAULT_MEMORY_MAP_ADDR: PhysAddr = 0x1000;
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pub fn new() -> Self {
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MemoryMap {
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table_addr: Self::DEFAULT_MEMORY_MAP_ADDR,
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regions: Vec::new(),
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}
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}
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pub fn identity_map(mmu: &mut MMU, region: &Region) {
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let first_page = region.base >> 12;
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let page_count = (region.size >> 12) as u32;
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for page in (first_page..first_page + page_count).map(|p| p << 12) {
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mmu.create_mapping(page, page);
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}
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}
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}
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impl Default for MemoryMap {
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fn default() -> Self {
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ron::from_str(include_str!("../../config/dsa.mmap.ron")).unwrap()
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}
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}
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