Update assembler/usage
-16
@@ -1,16 +0,0 @@
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# Pseudo Instructions Reference
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| Mnemonic | Args | Description |
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|----------|------|-------------|
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| DB | name, u8[..] | Takes a comma separated list of bytes and inserts them into the binary at a location addressable by 'name' |
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| DH | name, u16[..] | Takes a comma separated list of 16-bit values and inserts them into the binary at a location addressable by 'name' |
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| DW | name, u32[..] | Takes a comma separated list of 32-bit values and inserts them into the binary at a location addressable by 'name' |
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| RESB | name, size | Reserves space for 'size' 8-bit values at a location addressable by 'name' |
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| RESH | name, size | Reserves space for 'size' 16-bit values at a location addressable by 'name' |
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| RESW | name, size | Reserves space for 'size' 32-bit values at a location addressable by 'name' |
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| PUSH | reg | Pushes the value in 'reg' to the stack. Equivalent to: `INC SPR` then `STW register, SPR` |
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| POP | reg | Pops the top value in the stack to 'reg'. Equivalent to: `LDW SPR, register` then `DEC SPR` |
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| LDB | name, reg | Loads the 8-bit value at the address referenced by name into reg. Equivalent to: `LLI varname, reg`, `LUI varname, reg`, `LDB reg, reg` |
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| LDH | name, reg | Loads the top 16-bits of the value at the address referenced by name into reg. Equivalent to: `LLI varname, reg`, `LUI varname, reg`, `LDH (0)reg, reg` |
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| LDW | name, reg | Loads the 32-bit value at the address referenced by name into reg. Equivalent to: `LLI varname, reg`, `LUI varname, reg`, `LDW reg, reg` |
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| LWI | name, reg | Loads the address of 'name' into reg. Equivalent to: `LLI name, reg`, `LUI name, reg` |
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+883
@@ -0,0 +1,883 @@
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# DSA Assembly Language Instruction Reference
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## Overview
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This document provides a comprehensive reference for the DSA (Damn Simple Architecture) assembly language, including all hardware instructions and pseudo-instructions with their syntax variations and usage examples.
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## Syntax Conventions
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- `reg` - Register operand
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- `imm` - Immediate value (16-bit for I-type instructions)
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- `addr` - Memory address or label
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- `offset` - Memory offset (optional, defaults to 0)
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- `[]` - Optional parameters
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- `|` - Alternative syntax options
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## Registers
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- general purpose: `rg0-rgf`
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- be careful when using `rgf` for storing data as some pseduo-instructions may implicitly overwrite this register.
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- special registers:
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- ``
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## Hardware Instructions
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### Data Movement Instructions
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#### MOV - Move Register to Register
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```assembly
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mov src_reg, dest_reg
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```
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**Example:**
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```assembly
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mov rg0, rg1 ; Copy value from rg0 to rg1
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mov acc, rg2 ; Copy accumulator to rg2
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```
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#### MOVS - Move with Sign Extension
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```assembly
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movs src_reg, dest_reg
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```
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**Example:**
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```assembly
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movs rg0, rg1 ; Copy rg0 to rg1 with sign extension
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```
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### Memory Access Instructions
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#### Load Instructions
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##### LDB - Load Byte
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```assembly
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ldb base_reg, dest_reg [, offset]
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ldb label, dest_reg [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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ldb rg0, rg1 ; Load byte from address in rg0 to rg1
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ldb rg0, rg1, 5 ; Load byte from (rg0 + 5) to rg1
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; Label addressing - expands to multiple instructions
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ldb buffer, rg2 ; Load byte from label 'buffer' to rg2
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```
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**Label expansion:** When using a label, `ldb buffer, rg2` expands to:
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```assembly
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lli buffer, rg2 ; Load lower 16 bits of buffer address
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lui buffer, rg2 ; Load upper 16 bits of buffer address
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ldb rg2, rg2 ; Load byte from address in rg2 to rg2
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```
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**With offset:** `ldb buffer, rg2, 10` expands to:
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```assembly
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lli buffer, rg2 ; Load lower 16 bits of buffer address
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lui buffer, rg2 ; Load upper 16 bits of buffer address
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ldb rg2, rg2, 10 ; Load byte from (rg2 + 10) to rg2
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```
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##### LDBS - Load Byte (Sign Extended)
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```assembly
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ldbs base_reg, dest_reg [, offset]
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ldbs label, dest_reg [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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ldbs rg0, rg1 ; Load sign-extended byte from rg0 to rg1
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ldbs rg0, rg1, 10 ; Load sign-extended byte from (rg0 + 10)
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; Label addressing
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ldbs data_array, rg3 ; Load sign-extended byte from 'data_array'
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```
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**Label expansion:** `ldbs data_array, rg3` expands to:
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```assembly
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lli data_array, rg3 ; Load lower 16 bits of data_array address
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lui data_array, rg3 ; Load upper 16 bits of data_array address
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ldbs rg3, rg3 ; Load sign-extended byte from rg3 to rg3
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```
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##### LDH - Load Half-word
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```assembly
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ldh base_reg, dest_reg [, offset]
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ldh label, dest_reg [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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ldh rg0, rg1 ; Load 16-bit value from rg0 to rg1
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ldh rg0, rg1, 2 ; Load 16-bit value from (rg0 + 2)
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; Label addressing
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ldh config_table, rg4 ; Load half-word from 'config_table'
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```
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**Label expansion:** `ldh config_table, rg4, 6` expands to:
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```assembly
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lli config_table, rg4 ; Load lower 16 bits of config_table address
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lui config_table, rg4 ; Load upper 16 bits of config_table address
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ldh rg4, rg4, 6 ; Load half-word from (rg4 + 6) to rg4
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```
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##### LDHS - Load Half-word (Sign Extended)
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```assembly
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ldhs base_reg, dest_reg [, offset]
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ldhs label, dest_reg [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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ldhs rg0, rg1 ; Load sign-extended 16-bit value
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ldhs rg0, rg1, 4 ; Load from (rg0 + 4) with sign extension
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; Label addressing
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ldhs signed_values, rg5 ; Load sign-extended half-word from label
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```
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**Label expansion:** `ldhs signed_values, rg5` expands to:
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```assembly
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lli signed_values, rg5 ; Load lower 16 bits of signed_values address
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lui signed_values, rg5 ; Load upper 16 bits of signed_values address
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ldhs rg5, rg5 ; Load sign-extended half-word from rg5 to rg5
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```
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##### LDW - Load Word
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```assembly
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ldw base_reg, dest_reg [, offset]
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ldw label, dest_reg [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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ldw rg0, rg1 ; Load 32-bit word from rg0 to rg1
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ldw rg0, rg1, 8 ; Load word from (rg0 + 8)
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; Label addressing
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ldw stack, bpr ; Load stack address into base pointer
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ldw current, rg1 ; Load word from 'current' variable
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```
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**Label expansion:** `ldw stack, bpr` expands to:
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```assembly
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lli stack, bpr ; Load lower 16 bits of stack address
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lui stack, bpr ; Load upper 16 bits of stack address
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ldw bpr, bpr ; Load word from address in bpr to bpr
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```
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#### Store Instructions
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##### STB - Store Byte
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```assembly
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stb src_reg, base_reg [, offset]
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stb src_reg, label [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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stb rg0, rg1 ; Store byte from rg0 to address in rg1
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stb rg0, rg1, 3 ; Store byte to (rg1 + 3)
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; Label addressing
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stb acc, buffer ; Store byte from accumulator to 'buffer'
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stb rg2, output, 5 ; Store byte to (output + 5)
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```
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**Label expansion:** When using a label, `stb acc, buffer` expands to:
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```assembly
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lli buffer, rgf ; Load lower 16 bits of buffer address to temp register
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lui buffer, rgf ; Load upper 16 bits of buffer address to temp register
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stb acc, rgf ; Store byte from acc to address in rgf
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```
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**With offset:** `stb rg2, output, 5` expands to:
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```assembly
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lli output, rgf ; Load lower 16 bits of output address
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lui output, rgf ; Load upper 16 bits of output address
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stb rg2, rgf, 5 ; Store byte to (rgf + 5)
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```
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##### STH - Store Half-word
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```assembly
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sth src_reg, base_reg [, offset]
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sth src_reg, label [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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sth rg0, rg1 ; Store 16-bit value from rg0
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sth rg0, rg1, 6 ; Store to (rg1 + 6)
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; Label addressing
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sth rg3, config_word ; Store half-word to 'config_word'
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sth acc, data_table, 12 ; Store to (data_table + 12)
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```
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**Label expansion:** `sth rg3, config_word` expands to:
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```assembly
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lli config_word, rgf ; Load lower 16 bits of config_word address
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lui config_word, rgf ; Load upper 16 bits of config_word address
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sth rg3, rgf ; Store half-word from rg3 to address in rgf
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```
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##### STW - Store Word
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```assembly
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stw src_reg, base_reg [, offset]
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stw src_reg, label [, offset]
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```
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**Examples:**
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```assembly
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; Direct register addressing
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stw rg0, rg1 ; Store 32-bit word from rg0
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stw rg0, rg1, 12 ; Store to (rg1 + 12)
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; Label addressing
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stw rg1, current ; Store word to 'current' variable
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stw acc, result_buffer, 8 ; Store accumulator to (result_buffer + 8)
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```
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**Label expansion:** `stw rg1, current` expands to:
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```assembly
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lli current, rgf ; Load lower 16 bits of current address
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lui current, rgf ; Load upper 16 bits of current address
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stw rg1, rgf ; Store word from rg1 to address in rgf
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```
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**Complex example with label and offset:** `stw acc, array_base, 16` expands to:
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```assembly
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lli array_base, rgf ; Load lower 16 bits of array_base address
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lui array_base, rgf ; Load upper 16 bits of array_base address
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stw acc, rgf, 16 ; Store accumulator to (rgf + 16)
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```
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### Immediate Load Instructions
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#### LLI - Load Lower Immediate
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```assembly
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lli imm, dest_reg
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```
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**Examples:**
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```assembly
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lli 0x1234, rg0 ; Load 0x1234 into lower 16 bits of rg0
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lli 100, acc ; Load 100 into lower 16 bits of accumulator
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```
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#### LUI - Load Upper Immediate
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```assembly
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lui imm, dest_reg
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```
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**Examples:**
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```assembly
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lui 0xABCD, rg0 ; Load 0xABCD into upper 16 bits of rg0
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lui 200, acc ; Load 200 into upper 16 bits of accumulator
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```
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### Jump Instructions
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#### JMP - Unconditional Jump
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```assembly
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jmp addr [, offset_reg]
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jmp imm, offset_reg
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```
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**Examples:**
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```assembly
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jmp start ; Jump to label 'start'
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jmp 4, ret ; Jump to address (4 + ret register)
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jmp loop ; Jump to label 'loop'
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```
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#### Conditional Jumps
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##### JEQ - Jump if Equal
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```assembly
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jeq addr [, offset_reg]
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```
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**Examples:**
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||||
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```assembly
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jeq end ; Jump to 'end' if equal flag set
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jeq 8, ret ; Jump to (8 + ret) if equal
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```
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##### JNE - Jump if Not Equal
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```assembly
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jne addr [, offset_reg]
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```
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**Examples:**
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```assembly
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jne loop ; Jump to 'loop' if not equal
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jne continue ; Jump to 'continue' if not equal
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```
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##### JGT - Jump if Greater Than
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```assembly
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jgt addr [, offset_reg]
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```
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**Examples:**
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```assembly
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jgt start ; Jump to 'start' if greater than flag set
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jgt positive ; Jump to 'positive' if greater
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```
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##### JGE - Jump if Greater or Equal
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```assembly
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jge addr [, offset_reg]
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```
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##### JLT - Jump if Less Than
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```assembly
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jlt addr [, offset_reg]
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```
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##### JLE - Jump if Less or Equal
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```assembly
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jle addr [, offset_reg]
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```
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### Arithmetic Instructions
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#### ADD - Addition
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```assembly
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add src1_reg, src2_reg, dest_reg
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```
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**Examples:**
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```assembly
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add rg0, rg1, rg2 ; rg2 = rg0 + rg1
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add rg1, rg2, acc ; acc = rg1 + rg2
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```
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#### SUB - Subtraction
|
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```assembly
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sub src1_reg, src2_reg, dest_reg
|
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```
|
||||
|
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**Examples:**
|
||||
|
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```assembly
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sub rg0, rg1, rg2 ; rg2 = rg0 - rg1
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sub acc, rg1, acc ; acc = acc - rg1
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```
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||||
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#### IADD - Immediate Addition
|
||||
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||||
```assembly
|
||||
iadd src_reg, imm [, dest_reg]
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
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```assembly
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iadd rg0, 10 ; rg0 = rg0 + 10
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iadd rg0, 5, rg1 ; rg1 = rg0 + 5
|
||||
```
|
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|
||||
#### ISUB - Immediate Subtraction
|
||||
|
||||
```assembly
|
||||
isub src_reg, imm [, dest_reg]
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
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isub rg0, 7 ; rg0 = rg0 - 7
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isub rg0, 3, rg1 ; rg1 = rg0 - 3
|
||||
```
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||||
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||||
#### INC - Increment
|
||||
|
||||
```assembly
|
||||
inc reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
inc rg0 ; rg0 = rg0 + 1
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inc spr ; Increment stack pointer
|
||||
```
|
||||
|
||||
#### DEC - Decrement
|
||||
|
||||
```assembly
|
||||
dec reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
dec rg0 ; rg0 = rg0 - 1
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dec rg1 ; Decrement rg1
|
||||
```
|
||||
|
||||
### Bitwise Operations
|
||||
|
||||
#### AND - Bitwise AND
|
||||
|
||||
```assembly
|
||||
and src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
and rg0, rg1, rg2 ; rg2 = rg0 & rg1
|
||||
```
|
||||
|
||||
#### OR - Bitwise OR
|
||||
|
||||
```assembly
|
||||
or src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
#### XOR - Bitwise XOR
|
||||
|
||||
```assembly
|
||||
xor src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
#### NOT - Bitwise NOT
|
||||
|
||||
```assembly
|
||||
not src_reg, dest_reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
not rg0, rg1 ; rg1 = ~rg0
|
||||
```
|
||||
|
||||
#### NAND - Bitwise NAND
|
||||
|
||||
```assembly
|
||||
nand src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
#### NOR - Bitwise NOR
|
||||
|
||||
```assembly
|
||||
nor src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
#### XNOR - Bitwise XNOR
|
||||
|
||||
```assembly
|
||||
xnor src1_reg, src2_reg, dest_reg
|
||||
```
|
||||
|
||||
### Shift Operations
|
||||
|
||||
#### SHL - Shift Left
|
||||
|
||||
```assembly
|
||||
shl reg, shift_amount
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
shl rg0, 2 ; Shift rg0 left by 2 bits
|
||||
shl acc, 4 ; Shift accumulator left by 4 bits
|
||||
```
|
||||
|
||||
#### SHR - Shift Right
|
||||
|
||||
```assembly
|
||||
shr reg, shift_amount
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
shr rg0, 3 ; Shift rg0 right by 3 bits
|
||||
```
|
||||
|
||||
### Comparison and Control
|
||||
|
||||
#### CMP - Compare
|
||||
|
||||
```assembly
|
||||
cmp reg1, reg2
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
cmp rg0, zero ; Compare rg0 with zero register
|
||||
cmp rg1, rg2 ; Compare rg1 with rg2
|
||||
```
|
||||
|
||||
### System Instructions
|
||||
|
||||
#### HLT - Halt
|
||||
|
||||
```assembly
|
||||
hlt
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
hlt ; Stop processor execution
|
||||
```
|
||||
|
||||
#### NOP - No Operation
|
||||
|
||||
```assembly
|
||||
nop
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
nop ; Do nothing for one cycle
|
||||
```
|
||||
|
||||
#### INT - Interrupt
|
||||
|
||||
```assembly
|
||||
int interrupt_code
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
int 0x21 ; Trigger interrupt 0x21
|
||||
```
|
||||
|
||||
#### IRT - Interrupt Return
|
||||
|
||||
```assembly
|
||||
irt
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
irt ; Return from interrupt
|
||||
```
|
||||
|
||||
## Pseudo-Instructions
|
||||
|
||||
### Data Definition
|
||||
|
||||
#### DB - Define Bytes
|
||||
|
||||
```assembly
|
||||
db name: value1 [, value2, ...]
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
db message: "Hello World", 0
|
||||
db values: 10, 20, 30, 0xFF
|
||||
db fib_count: 10
|
||||
```
|
||||
|
||||
#### DH - Define Half-words
|
||||
|
||||
```assembly
|
||||
dh name: value1 [, value2, ...]
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
dh numbers: 1000, 2000, 3000
|
||||
dh coordinates: 0x1234, 0x5678
|
||||
```
|
||||
|
||||
#### DW - Define Words
|
||||
|
||||
```assembly
|
||||
dw name: value1 [, value2, ...]
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
dw stack: 0x10000
|
||||
dw display: 0x20000
|
||||
dw buffer: 0x8000, 0x9000
|
||||
```
|
||||
|
||||
### Memory Reservation
|
||||
|
||||
#### RESB - Reserve Bytes
|
||||
|
||||
```assembly
|
||||
resb name: size
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
resb buffer: 256 ; Reserve 256 bytes
|
||||
```
|
||||
|
||||
#### RESH - Reserve Half-words
|
||||
|
||||
```assembly
|
||||
resh name: size
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
resh array: 100 ; Reserve space for 100 half-words
|
||||
```
|
||||
|
||||
#### RESW - Reserve Words
|
||||
|
||||
```assembly
|
||||
resw name: size
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
resw heap: 1024 ; Reserve space for 1024 words
|
||||
```
|
||||
|
||||
### Stack Operations
|
||||
|
||||
#### PUSH - Push to Stack
|
||||
|
||||
```assembly
|
||||
push reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
push rg0 ; Push rg0 value onto stack
|
||||
push pcx ; Push program counter
|
||||
push ret ; Push return address
|
||||
```
|
||||
|
||||
#### POP - Pop from Stack
|
||||
|
||||
```assembly
|
||||
pop reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
pop rg0 ; Pop top stack value into rg0
|
||||
pop ret ; Pop return address
|
||||
```
|
||||
|
||||
### Memory Access Shortcuts
|
||||
|
||||
#### LWI - Load Word Immediate (Address)
|
||||
|
||||
```assembly
|
||||
lwi name, reg
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
lwi string, rg1 ; Load address of 'string' into rg1
|
||||
lwi buffer, rg0 ; Load address of 'buffer' into rg0
|
||||
```
|
||||
|
||||
### Module System
|
||||
|
||||
#### INCLUDE - Include Module
|
||||
|
||||
```assembly
|
||||
include module_name "path"
|
||||
```
|
||||
|
||||
**Examples:**
|
||||
|
||||
```assembly
|
||||
include print "../resources/dsa/print.dsa"
|
||||
include fib "../resources/dsa/fib.dsa"
|
||||
```
|
||||
|
||||
## Complete Example Program
|
||||
|
||||
Here's a complete example showing various instruction usage, including label-based memory operations:
|
||||
|
||||
```assembly
|
||||
include print "../resources/dsa/print.dsa"
|
||||
include fib "../resources/dsa/fib.dsa"
|
||||
|
||||
; Data definitions
|
||||
dw stack: 0x10000
|
||||
dw display: 0x20000
|
||||
dw current: 0x20000
|
||||
db message: "Computing Fibonacci sequence...", 0
|
||||
db result_buffer: 0, 0, 0, 0 ; Space for 32-bit result
|
||||
dh config_values: 100, 200, 300
|
||||
|
||||
init:
|
||||
; Load stack address using label expansion
|
||||
ldw stack, bpr ; Expands to: lli stack,bpr; lui stack,bpr; ldw bpr,bpr
|
||||
mov bpr, spr ; Set stack pointer
|
||||
|
||||
; Store display address to current using label expansion
|
||||
ldw display, rg0 ; Load display address
|
||||
stw rg0, current ; Expands to: lli current,rgf; lui current,rgf; stw rg0,rgf
|
||||
|
||||
start:
|
||||
; Load message address for printing
|
||||
lwi message, rg1 ; Load message address directly
|
||||
|
||||
; Print message
|
||||
push rg1 ; Push message address
|
||||
push pcx ; Push return address
|
||||
jmp print::print ; Call print function
|
||||
|
||||
; Calculate 25th Fibonacci number
|
||||
lli 25, rg0 ; Load 25 into rg0
|
||||
push rg0 ; Push argument
|
||||
push pcx ; Push return address
|
||||
jmp fib::fib_n ; Call Fibonacci function
|
||||
|
||||
; Store result using label expansion
|
||||
stw acc, result_buffer ; Expands to: lli result_buffer,rgf; lui result_buffer,rgf; stw acc,rgf
|
||||
|
||||
; Load and modify config value
|
||||
ldh config_values, rg2, 2 ; Load second config value (offset 2)
|
||||
; Expands to: lli config_values,rg2; lui config_values,rg2; ldh rg2,rg2,2
|
||||
iadd rg2, 50 ; Add 50 to the config value
|
||||
sth rg2, config_values, 2 ; Store back to second position
|
||||
; Expands to: lli config_values,rgf; lui config_values,rgf; sth rg2,rgf,2
|
||||
|
||||
hlt ; Halt execution
|
||||
|
||||
; Example of label addressing in a loop
|
||||
copy_data:
|
||||
lli 0, rg0 ; Counter = 0
|
||||
lli 10, rg1 ; Loop limit = 10
|
||||
|
||||
copy_loop:
|
||||
; Load byte from source array
|
||||
ldb source_array, rg2, rg0 ; Load source_array[counter]
|
||||
; Note: This would need array indexing logic in practice
|
||||
|
||||
; Store to destination array
|
||||
stb rg2, dest_array, rg0 ; Store to dest_array[counter]
|
||||
|
||||
inc rg0 ; counter++
|
||||
cmp rg0, rg1 ; Compare with limit
|
||||
jlt copy_loop ; Continue if less than limit
|
||||
|
||||
jmp 4, ret ; Return
|
||||
|
||||
; Data arrays for copy example
|
||||
db source_array: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10
|
||||
resb dest_array: 10 ; Reserve 10 bytes for destination
|
||||
```
|
||||
|
||||
## Label Addressing Summary
|
||||
|
||||
**Load Instructions with Labels:**
|
||||
|
||||
- All load instructions (`ldb`, `ldbs`, `ldh`, `ldhs`, `ldw`) can use labels
|
||||
- They expand into 3 instructions: `lli` → `lui` → original load instruction
|
||||
- The destination register is used as a temporary for the address calculation
|
||||
|
||||
**Store Instructions with Labels:**
|
||||
|
||||
- All store instructions (`stb`, `sth`, `stw`) can use labels
|
||||
- They expand into 3 instructions: `lli` → `lui` → original store instruction
|
||||
- The `rgf` register is used as a temporary for the address calculation
|
||||
- Source register remains unchanged
|
||||
|
||||
**Key Points:**
|
||||
|
||||
- Label expansion happens at assembly time, not runtime
|
||||
- Offsets work the same way with labels as with direct register addressing
|
||||
- The temporary register (`rgf` for stores) should not be used for other purposes during store operations
|
||||
- Load operations modify the destination register during address calculation
|
||||
|
||||
## Register Usage
|
||||
|
||||
The DSA architecture includes several special registers:
|
||||
|
||||
- `acc` - Accumulator register
|
||||
- `zero` - Always contains zero
|
||||
- `pcx` - Program counter
|
||||
- `spr` - Stack pointer
|
||||
- `bpr` - Base pointer
|
||||
- `ret` - Return address register
|
||||
- `rg0`-`rg15` - General purpose registers
|
||||
|
||||
## Addressing Modes
|
||||
|
||||
1. **Register Direct**: `mov rg0, rg1`
|
||||
2. **Immediate**: `lli 100, rg0`
|
||||
3. **Memory Direct**: `ldw buffer, rg0`
|
||||
4. **Memory with Offset**: `ldw rg0, rg1, 8`
|
||||
5. **Label/Symbol**: `jmp start`
|
||||
Reference in New Issue
Block a user