# Hardware Instructions ### Data Movement Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **MOV** | `src_reg, dest_reg` | Copy value from source to destination register | | **MOVS** | `src_reg, dest_reg` | Copy with sign extension | **Examples:** ```dsa mov rg0, rg1 ; Copy rg0 to rg1 movs rg0, rg1 ; Copy rg0 to rg1 with sign extension ``` ### Memory Access Instructions #### Load Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **LDB** | `base_reg, dest_reg [, offset]`
`label, dest_reg [, offset]` | Load byte from memory | | **LDBS** | `base_reg, dest_reg [, offset]`
`label, dest_reg [, offset]` | Load byte with sign extension | | **LDH** | `base_reg, dest_reg [, offset]`
`label, dest_reg [, offset]` | Load half-word (16-bit) | | **LDHS** | `base_reg, dest_reg [, offset]`
`label, dest_reg [, offset]` | Load half-word with sign extension | | **LDW** | `base_reg, dest_reg [, offset]`
`label, dest_reg [, offset]` | Load word (32-bit) | **Examples:** ```dsa ; Direct register addressing ldb rg0, rg1 ; Load byte from address in rg0 ldw rg0, rg1, 8 ; Load word from (rg0 + 8) ; Label addressing ldb buffer, rg2 ; Load byte from label 'buffer' ldw stack, bpr ; Load stack address into base pointer ``` **Label Expansions:** ```dsa ; ldb buffer, rg2 expands to: lli buffer, rg2 ; Load lower 16 bits of buffer address lui buffer, rg2 ; Load upper 16 bits of buffer address ldb rg2, rg2 ; Load byte from address in rg2 ; ldw stack, bpr expands to: lli stack, bpr ; Load lower 16 bits of stack address lui stack, bpr ; Load upper 16 bits of stack address ldw bpr, bpr ; Load word from address in bpr ``` #### Store Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **STB** | `src_reg, base_reg [, offset]`
`src_reg, label [, offset]` | Store byte to memory | | **STH** | `src_reg, base_reg [, offset]`
`src_reg, label [, offset]` | Store half-word to memory | | **STW** | `src_reg, base_reg [, offset]`
`src_reg, label [, offset]` | Store word to memory | **Examples:** ```dsa ; Direct register addressing stb rg0, rg1 ; Store byte from rg0 to address in rg1 stw rg0, rg1, 12 ; Store word to (rg1 + 12) ; Label addressing stb acc, buffer ; Store byte from accumulator to 'buffer' stw rg1, current ; Store word to 'current' variable ``` **Label Expansions:** ```dsa ; stb acc, buffer expands to: lli buffer, rgf ; Load lower 16 bits of buffer address lui buffer, rgf ; Load upper 16 bits of buffer address stb acc, rgf ; Store byte from acc to address in rgf ; stw rg1, current expands to: lli current, rgf ; Load lower 16 bits of current address lui current, rgf ; Load upper 16 bits of current address stw rg1, rgf ; Store word from rg1 to address in rgf ``` ### Immediate Load Instructions | Mnemonic | Operands | Description | |----------|----------|------------------------------------------------------------------------| | **LLI** | `imm, dest_reg` | Load 16-bit immediate into lower 16 bits
**Clears upper 16 bits!** | | **LUI** | `imm, dest_reg` | Load 16-bit immediate into upper 16 bits | **Usage** ensure that you always run **Lli** before **Lui** as **Lli** clears the upper 16 bits. **Examples:** ```dsa lli 0x1234, rg0 ; Load 0x1234 into lower 16 bits of rg0 lui 0xABCD, rg0 ; Load 0xABCD into upper 16 bits of rg0 ``` ### Jump Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **JMP** | `addr [, offset_reg]`
`imm, offset_reg` | Unconditional jump | | **JEQ** | `addr [, offset_reg]` | Jump if equal flag set | | **JNE** | `addr [, offset_reg]` | Jump if not equal flag set | | **JGT** | `addr [, offset_reg]` | Jump if greater than flag set | | **JGE** | `addr [, offset_reg]` | Jump if greater or equal flags set | | **JLT** | `addr [, offset_reg]` | Jump if less than flag set | | **JLE** | `addr [, offset_reg]` | Jump if less or equal flags set | **Examples:** ```dsa jmp start ; Jump to label 'start' jmp 4, ret ; Jump to address (4 + ret register) jeq end ; Jump to 'end' if equal flag set jgt loop ; Jump to 'loop' if greater than flag set ``` ### Arithmetic Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **ADD** | `src1_reg, src2_reg, dest_reg` | Addition | | **SUB** | `src1_reg, src2_reg, dest_reg` | Subtraction | | **IADD** | `src_reg, imm [, dest_reg]` | Immediate addition | | **ISUB** | `src_reg, imm [, dest_reg]` | Immediate subtraction | | **INC** | `reg` | Increment register by 1 | | **DEC** | `reg` | Decrement register by 1 | **Examples:** ```dsa add rg0, rg1, rg2 ; rg2 = rg0 + rg1 sub rg0, rg1, rg2 ; rg2 = rg0 - rg1 iadd rg0, 10 ; rg0 = rg0 + 10 // or using alternate syntax addi rg0, 1 ; rg0 = rg0 + 1 inc rg0 ; rg0 = rg0 + 1 ``` ### Bitwise Operations | Mnemonic | Operands | Description | |----------|----------|-------------| | **AND** | `src1_reg, src2_reg, dest_reg` | Bitwise AND | | **OR** | `src1_reg, src2_reg, dest_reg` | Bitwise OR | | **XOR** | `src1_reg, src2_reg, dest_reg` | Bitwise XOR | | **NOT** | `src_reg, dest_reg` | Bitwise NOT | | **NAND** | `src1_reg, src2_reg, dest_reg` | Bitwise NAND | | **NOR** | `src1_reg, src2_reg, dest_reg` | Bitwise NOR | | **XNOR** | `src1_reg, src2_reg, dest_reg` | Bitwise XNOR | **Examples:** ```dsa and rg0, rg1, rg2 ; rg2 = rg0 & rg1 not rg0, rg1 ; rg1 = ~rg0 ``` ### Shift Operations | Mnemonic | Operands | Description | |----------|----------|-------------| | **SHL** | `reg, shift_amount` | Shift left | | **SHR** | `reg, shift_amount` | Shift right | **Examples:** ```dsa shl rg0, 2 ; Shift rg0 left by 2 bits shr rg0, 3 ; Shift rg0 right by 3 bits ``` ### Comparison and Control | Mnemonic | Operands | Description | |----------|----------|-------------| | **CMP** | `reg1, reg2` | Compare registers and set flags | **Examples:** ```dsa cmp rg0, zero ; Compare rg0 with zero register cmp rg1, rg2 ; Compare rg1 with rg2 ``` ### System Instructions | Mnemonic | Operands | Description | |----------|----------|-------------| | **HLT** | - | Halt processor execution | | **NOP** | - | No operation | | **INT** | `interrupt_code` | Trigger interrupt | | **IRT** | - | Return from interrupt | **Examples:** ```dsa hlt ; Stop processor execution int 0x21 ; Trigger interrupt 0x21 ```