docs first version
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# Data Directives
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### Data Definition
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| Mnemonic | Syntax | Description |
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|----------|--------|-------------|
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| **DB** | `name: value1 [, value2, ...]` | Define bytes</br>*(byte aligned)*|
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| **DH** | `name: value1 [, value2, ...]` | Define half-words</br>*(2 byte aligned)*|
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| **DW** | `name: value1 [, value2, ...]` | Define words</br>*(4 byte aligned)*|
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**Examples:**
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```dsa
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db message: "Hello World", 0, 0x20, 231
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dh numbers: 1000, 2000, 3000
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dw stack: 0x10000
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```
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**Notes:**
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- All string literals are automatically *null-terminated*
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-
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### Memory Reservation
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| Mnemonic | Syntax | Description |
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|----------|--------|-------------|
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| **RESB** | `name: size` | Reserve bytes |
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| **RESH** | `name: size` | Reserve half-words |
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| **RESW** | `name: size` | Reserve words |
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**Examples:**
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```dsa
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resb buffer: 256 ; Reserve 256 bytes
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resh array: 100 ; Reserve space for 100 half-words
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resw heap: 1024 ; Reserve space for 1024 words
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```
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### Imports
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| Mnemonic | Syntax | Description |
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|----------|--------|-------------|
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| **INCLUDE** | `module_name "path"` | Include module symbols |
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[More details on the module System](../imports.md)
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# Hardware Instructions
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### Data Movement Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **MOV** | `src_reg, dest_reg` | Copy value from source to destination register |
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| **MOVS** | `src_reg, dest_reg` | Copy with sign extension |
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**Examples:**
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```dsa
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mov rg0, rg1 ; Copy rg0 to rg1
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movs rg0, rg1 ; Copy rg0 to rg1 with sign extension
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```
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### Memory Access Instructions
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#### Load Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **LDB** | `base_reg, dest_reg [, offset]`<br>`label, dest_reg [, offset]` | Load byte from memory |
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| **LDBS** | `base_reg, dest_reg [, offset]`<br>`label, dest_reg [, offset]` | Load byte with sign extension |
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| **LDH** | `base_reg, dest_reg [, offset]`<br>`label, dest_reg [, offset]` | Load half-word (16-bit) |
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| **LDHS** | `base_reg, dest_reg [, offset]`<br>`label, dest_reg [, offset]` | Load half-word with sign extension |
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| **LDW** | `base_reg, dest_reg [, offset]`<br>`label, dest_reg [, offset]` | Load word (32-bit) |
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**Examples:**
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```dsa
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; Direct register addressing
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ldb rg0, rg1 ; Load byte from address in rg0
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ldw rg0, rg1, 8 ; Load word from (rg0 + 8)
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; Label addressing
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ldb buffer, rg2 ; Load byte from label 'buffer'
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ldw stack, bpr ; Load stack address into base pointer
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```
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**Label Expansions:**
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```dsa
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; ldb buffer, rg2 expands to:
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lli buffer, rg2 ; Load lower 16 bits of buffer address
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lui buffer, rg2 ; Load upper 16 bits of buffer address
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ldb rg2, rg2 ; Load byte from address in rg2
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; ldw stack, bpr expands to:
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lli stack, bpr ; Load lower 16 bits of stack address
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lui stack, bpr ; Load upper 16 bits of stack address
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ldw bpr, bpr ; Load word from address in bpr
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```
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#### Store Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **STB** | `src_reg, base_reg [, offset]`<br>`src_reg, label [, offset]` | Store byte to memory |
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| **STH** | `src_reg, base_reg [, offset]`<br>`src_reg, label [, offset]` | Store half-word to memory |
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| **STW** | `src_reg, base_reg [, offset]`<br>`src_reg, label [, offset]` | Store word to memory |
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**Examples:**
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```dsa
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; Direct register addressing
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stb rg0, rg1 ; Store byte from rg0 to address in rg1
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stw rg0, rg1, 12 ; Store word to (rg1 + 12)
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; Label addressing
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stb acc, buffer ; Store byte from accumulator to 'buffer'
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stw rg1, current ; Store word to 'current' variable
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```
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**Label Expansions:**
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```dsa
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; stb acc, buffer expands to:
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lli buffer, rgf ; Load lower 16 bits of buffer address
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lui buffer, rgf ; Load upper 16 bits of buffer address
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stb acc, rgf ; Store byte from acc to address in rgf
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; stw rg1, current expands to:
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lli current, rgf ; Load lower 16 bits of current address
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lui current, rgf ; Load upper 16 bits of current address
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stw rg1, rgf ; Store word from rg1 to address in rgf
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```
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### Immediate Load Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|------------------------------------------------------------------------|
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| **LLI** | `imm, dest_reg` | Load 16-bit immediate into lower 16 bits<br/>**Clears upper 16 bits!** |
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| **LUI** | `imm, dest_reg` | Load 16-bit immediate into upper 16 bits |
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**Usage**
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ensure that you always run **Lli** before **Lui** as **Lli** clears the upper 16 bits.
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**Examples:**
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```dsa
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lli 0x1234, rg0 ; Load 0x1234 into lower 16 bits of rg0
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lui 0xABCD, rg0 ; Load 0xABCD into upper 16 bits of rg0
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```
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### Jump Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **JMP** | `addr [, offset_reg]`<br>`imm, offset_reg` | Unconditional jump |
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| **JEQ** | `addr [, offset_reg]` | Jump if equal flag set |
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| **JNE** | `addr [, offset_reg]` | Jump if not equal flag set |
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| **JGT** | `addr [, offset_reg]` | Jump if greater than flag set |
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| **JGE** | `addr [, offset_reg]` | Jump if greater or equal flags set |
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| **JLT** | `addr [, offset_reg]` | Jump if less than flag set |
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| **JLE** | `addr [, offset_reg]` | Jump if less or equal flags set |
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**Examples:**
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```dsa
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jmp start ; Jump to label 'start'
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jmp 4, ret ; Jump to address (4 + ret register)
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jeq end ; Jump to 'end' if equal flag set
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jgt loop ; Jump to 'loop' if greater than flag set
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```
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### Arithmetic Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **ADD** | `src1_reg, src2_reg, dest_reg` | Addition |
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| **SUB** | `src1_reg, src2_reg, dest_reg` | Subtraction |
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| **IADD** | `src_reg, imm [, dest_reg]` | Immediate addition |
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| **ISUB** | `src_reg, imm [, dest_reg]` | Immediate subtraction |
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| **INC** | `reg` | Increment register by 1 |
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| **DEC** | `reg` | Decrement register by 1 |
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**Examples:**
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```dsa
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add rg0, rg1, rg2 ; rg2 = rg0 + rg1
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sub rg0, rg1, rg2 ; rg2 = rg0 - rg1
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iadd rg0, 10 ; rg0 = rg0 + 10
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// or using alternate syntax
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addi rg0, 1 ; rg0 = rg0 + 1
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inc rg0 ; rg0 = rg0 + 1
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```
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### Bitwise Operations
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **AND** | `src1_reg, src2_reg, dest_reg` | Bitwise AND |
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| **OR** | `src1_reg, src2_reg, dest_reg` | Bitwise OR |
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| **XOR** | `src1_reg, src2_reg, dest_reg` | Bitwise XOR |
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| **NOT** | `src_reg, dest_reg` | Bitwise NOT |
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| **NAND** | `src1_reg, src2_reg, dest_reg` | Bitwise NAND |
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| **NOR** | `src1_reg, src2_reg, dest_reg` | Bitwise NOR |
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| **XNOR** | `src1_reg, src2_reg, dest_reg` | Bitwise XNOR |
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**Examples:**
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```dsa
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and rg0, rg1, rg2 ; rg2 = rg0 & rg1
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not rg0, rg1 ; rg1 = ~rg0
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```
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### Shift Operations
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **SHL** | `reg, shift_amount` | Shift left |
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| **SHR** | `reg, shift_amount` | Shift right |
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**Examples:**
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```dsa
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shl rg0, 2 ; Shift rg0 left by 2 bits
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shr rg0, 3 ; Shift rg0 right by 3 bits
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```
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### Comparison and Control
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **CMP** | `reg1, reg2` | Compare registers and set flags |
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**Examples:**
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```dsa
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cmp rg0, zero ; Compare rg0 with zero register
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cmp rg1, rg2 ; Compare rg1 with rg2
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```
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### System Instructions
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **HLT** | - | Halt processor execution |
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| **NOP** | - | No operation |
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| **INT** | `interrupt_code` | Trigger interrupt |
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| **IRT** | - | Return from interrupt |
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**Examples:**
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```dsa
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hlt ; Stop processor execution
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int 0x21 ; Trigger interrupt 0x21
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```
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@@ -0,0 +1,24 @@
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# Pseudo Instructions
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### Stack Operations
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **PUSH** | `reg` | Push register value onto stack |
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| **POP** | `reg` | Pop stack value into register |
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**Examples:**
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```dsa
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push rg0 ; Push rg0 value onto stack
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pop ret ; Pop return address
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```
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### Memory Access Shortcuts
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| Mnemonic | Operands | Description |
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|----------|----------|-------------|
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| **LWI** | `name, reg` | Load address into register |
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**Examples:**
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```dsa
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lwi string, rg1 ; Load address of 'string' into rg1
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```
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