reoganised project
This commit is contained in:
@@ -0,0 +1,54 @@
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use std::{
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fmt,
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path::{Path, PathBuf},
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};
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#[derive(Debug, Clone)]
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pub enum BuildError {
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IoError(String),
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Generic(String),
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}
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impl From<std::io::Error> for BuildError {
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fn from(err: std::io::Error) -> Self {
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Self::IoError(err.to_string())
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}
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}
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impl From<Box<dyn std::error::Error>> for BuildError {
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fn from(err: Box<dyn std::error::Error>) -> Self {
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Self::Generic(err.to_string())
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}
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}
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impl fmt::Display for BuildError {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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match self {
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Self::IoError(err) => write!(f, "IO Error: {err}"),
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Self::Generic(err) => write!(f, "Generic Error: {err}"),
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}
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}
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}
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pub trait Builder {
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type Output: Clone + std::convert::AsRef<[u8]>;
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fn new(src_path: impl Into<PathBuf>) -> Self;
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// starts compilation
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fn start(&mut self);
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// non-blocking function, returns output if completed
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fn poll(&mut self) -> Option<Result<Self::Output, BuildError>>;
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// blocking function, returns output when completed.
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fn output(&mut self) -> Result<Self::Output, BuildError>;
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fn write_result(&mut self, path: impl AsRef<Path>) -> Result<(), BuildError> {
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let output = self.output()?;
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std::fs::write(path.as_ref(), output)
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.map_err(|e| BuildError::IoError(e.to_string()))
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}
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fn logs(&self) -> Vec<String>;
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}
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@@ -0,0 +1,513 @@
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use crate::{instructions::encode::Encode, prelude::*};
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum Interrupt {
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Software(u8),
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Breakpoint,
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HardFault,
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}
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pub type Address = u32;
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impl Interrupt {
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// someone tell clippy to stfu.
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#[allow(clippy::must_use_candidate)]
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pub const fn as_u8(self) -> u8 {
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match self {
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Self::Breakpoint => 0,
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Self::HardFault => 1,
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Self::Software(code) => code,
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}
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}
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}
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// TODO: This should be TryFrom.
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impl From<u8> for Interrupt {
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#[allow(unreachable_code)]
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fn from(code: u8) -> Self {
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match code {
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0 => Self::Breakpoint,
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1 => Self::HardFault,
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_ => Self::Software(code),
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}
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}
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}
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/// Whether an [`Instruction`] is an I-type or R-type instruction.
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#[non_exhaustive]
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pub enum InstructionType {
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Register,
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Immediate,
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}
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#[derive(Copy, Clone, Debug, PartialEq, Eq, Default)]
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#[non_exhaustive]
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pub enum Register {
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// general purpose registers
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Rg0,
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Rg1,
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Rg2,
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Rg3,
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Rg4,
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Rg5,
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Rg6,
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Rg7,
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Rg8,
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Rg9,
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Rga,
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Rgb,
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Rgc,
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Rgd,
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Rge,
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Rgf,
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// special purpose registers
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Acc,
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Spr,
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Bpr,
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Ret,
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Idr,
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Mmr,
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Zero,
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#[default]
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Null, // Invalid - Triggers a fault if accessed
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// system registers - can't be written to by instructions.
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Mar,
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Mdr,
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Sts,
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Cir,
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Pcx,
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}
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impl Register {
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// this is here so clippy shuts up about the must_use tag.
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#[allow(clippy::must_use_candidate)]
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pub fn general() -> Vec<Self> {
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vec![
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Self::Rg0,
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Self::Rg1,
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Self::Rg2,
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Self::Rg3,
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Self::Rg4,
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Self::Rg5,
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Self::Rg6,
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Self::Rg7,
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Self::Rg8,
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Self::Rg9,
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Self::Rga,
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Self::Rgb,
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Self::Rgc,
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Self::Rgd,
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Self::Rge,
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Self::Rgf,
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]
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}
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}
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impl TryFrom<u8> for Register {
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type Error = RegisterParseError;
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fn try_from(idx: u8) -> Result<Self, Self::Error> {
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if idx > 0x1C {
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return Err(RegisterParseError::InvalidIndex(idx));
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}
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Ok(match idx {
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// System registers are not indexable in the reg file so they cannot be
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// modified by instructions.
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0x0 => Self::Rg0,
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0x1 => Self::Rg1,
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0x2 => Self::Rg2,
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0x3 => Self::Rg3,
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0x4 => Self::Rg4,
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0x5 => Self::Rg5,
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0x6 => Self::Rg6,
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0x7 => Self::Rg7,
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0x8 => Self::Rg8,
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0x9 => Self::Rg9,
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0xA => Self::Rga,
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0xB => Self::Rgb,
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0xC => Self::Rgc,
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0xD => Self::Rgd,
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0xE => Self::Rge,
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0xF => Self::Rgf,
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0x10 => Self::Acc,
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0x11 => Self::Spr,
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0x12 => Self::Bpr,
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0x13 => Self::Ret,
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0x14 => Self::Idr,
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0x15 => Self::Mmr,
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0x16 => Self::Zero,
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0x17 => Self::Null,
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0x18 => Self::Mar,
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0x19 => Self::Mdr,
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0x1A => Self::Sts,
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0x1B => Self::Cir,
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0x1C => Self::Pcx,
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_ => unreachable!("This is already checked for in top `if` branch."),
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})
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}
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}
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impl TryFrom<&str> for Register {
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type Error = RegisterParseError;
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fn try_from(value: &str) -> Result<Self, Self::Error> {
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match value.to_lowercase().as_str() {
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"rg0" => Ok(Self::Rg0),
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"rg1" => Ok(Self::Rg1),
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"rg2" => Ok(Self::Rg2),
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"rg3" => Ok(Self::Rg3),
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"rg4" => Ok(Self::Rg4),
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"rg5" => Ok(Self::Rg5),
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"rg6" => Ok(Self::Rg6),
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"rg7" => Ok(Self::Rg7),
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"rg8" => Ok(Self::Rg8),
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"rg9" => Ok(Self::Rg9),
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"rga" => Ok(Self::Rga),
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"rgb" => Ok(Self::Rgb),
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"rgc" => Ok(Self::Rgc),
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"rgd" => Ok(Self::Rgd),
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"rge" => Ok(Self::Rge),
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"rgf" => Ok(Self::Rgf),
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"acc" => Ok(Self::Acc),
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"spr" => Ok(Self::Spr),
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"bpr" => Ok(Self::Bpr),
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"ret" => Ok(Self::Ret),
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"idr" => Ok(Self::Idr),
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"mmr" => Ok(Self::Mmr),
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"zero" => Ok(Self::Zero),
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"null" => Ok(Self::Null),
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"pcx" => Ok(Self::Pcx),
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_ => Err(RegisterParseError::InvalidName(value.to_string())),
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}
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}
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}
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impl std::fmt::Display for Register {
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fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
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match self {
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Self::Rg0 => write!(f, "rg0"),
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Self::Rg1 => write!(f, "rg1"),
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Self::Rg2 => write!(f, "rg2"),
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Self::Rg3 => write!(f, "rg3"),
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Self::Rg4 => write!(f, "rg4"),
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Self::Rg5 => write!(f, "rg5"),
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Self::Rg6 => write!(f, "rg6"),
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Self::Rg7 => write!(f, "rg7"),
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Self::Rg8 => write!(f, "rg8"),
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Self::Rg9 => write!(f, "rg9"),
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Self::Rga => write!(f, "rga"),
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Self::Rgb => write!(f, "rgb"),
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Self::Rgc => write!(f, "rgc"),
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Self::Rgd => write!(f, "rgd"),
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Self::Rge => write!(f, "rge"),
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Self::Rgf => write!(f, "rgf"),
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Self::Acc => write!(f, "acc"),
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Self::Spr => write!(f, "spr"),
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Self::Bpr => write!(f, "bpr"),
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Self::Ret => write!(f, "ret"),
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Self::Idr => write!(f, "idr"),
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Self::Mmr => write!(f, "mmr"),
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Self::Zero => write!(f, "zero"),
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Self::Null => write!(f, "null"),
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Self::Mar => write!(f, "mar"),
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Self::Mdr => write!(f, "mdr"),
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Self::Sts => write!(f, "sts"),
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Self::Cir => write!(f, "cir"),
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Self::Pcx => write!(f, "pcx"),
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}
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}
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}
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#[derive(Debug, Clone, Copy, Eq)]
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#[repr(u8)]
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#[non_exhaustive]
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/// A list of all current instructions in the DSA.
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///
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/// # Note
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///
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/// This is subject to change and is therefore marked non exhaustive.
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pub enum Instruction {
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// No-op
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Nop = 0x0,
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// Data transfer instructions
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Mov(args::RTypeArgs) = 0x1,
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MovSigned(args::RTypeArgs) = 0x2,
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LoadByte(args::ITypeArgs) = 0x3,
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LoadByteSigned(args::ITypeArgs) = 0x4,
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LoadHalfword(args::ITypeArgs) = 0x5,
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LoadHalfwordSigned(args::ITypeArgs) = 0x6,
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LoadWord(args::ITypeArgs) = 0x7,
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StoreByte(args::ITypeArgs) = 0x8,
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StoreHalfword(args::ITypeArgs) = 0x9,
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StoreWord(args::ITypeArgs) = 0xA,
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LoadLowerImmediate(args::ITypeArgs) = 0xB,
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LoadUpperImmediate(args::ITypeArgs) = 0xC,
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// Jump Instructions
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Jump(args::ITypeArgs) = 0xD,
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JumpEq(args::ITypeArgs) = 0xE,
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JumpNeq(args::ITypeArgs) = 0xF,
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JumpGt(args::ITypeArgs) = 0x10,
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JumpGe(args::ITypeArgs) = 0x11,
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JumpLt(args::ITypeArgs) = 0x12,
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JumpLe(args::ITypeArgs) = 0x13,
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// Comparison
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Compare(args::RTypeArgs) = 0x14,
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// Arithmetic
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Add(args::RTypeArgs) = 0x19,
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Sub(args::RTypeArgs) = 0x1A,
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Increment(args::RTypeArgs) = 0x15,
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Decrement(args::RTypeArgs) = 0x16,
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ShiftLeft(args::RTypeArgs) = 0x17,
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ShiftRight(args::RTypeArgs) = 0x18,
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// Logical
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And(args::RTypeArgs) = 0x1B,
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Or(args::RTypeArgs) = 0x1C,
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Not(args::RTypeArgs) = 0x1D,
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Xor(args::RTypeArgs) = 0x1E,
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Nand(args::RTypeArgs) = 0x1F,
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Nor(args::RTypeArgs) = 0x20,
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Xnor(args::RTypeArgs) = 0x21,
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// Misc
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Interrupt(Interrupt) = 0x22,
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IntReturn = 0x23,
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Halt = 0x24,
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// Immediate Arithmetic
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AddImmediate(args::ITypeArgs) = 0x25,
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SubImmediate(args::ITypeArgs) = 0x26,
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// Fake Instructions
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Data(u32) = 0x3E,
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Segment(u32) = 0x3F,
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}
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impl PartialEq for Instruction {
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fn eq(&self, other: &Self) -> bool {
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self.encode() == other.encode()
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}
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}
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impl Instruction {
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/// Returns the opcode of an instruction.
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///
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/// # Notes
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||||
///
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||||
/// The top two bits shall be 0, opcodes are 6-bits long.
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#[must_use]
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pub const fn opcode(&self) -> u8 {
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unsafe { *std::ptr::from_ref::<Self>(self).cast::<u8>() }
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}
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/// Encodes an [`Instruction`] into a word.
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#[must_use]
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||||
pub fn encode(&self) -> u32 {
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Encode::encode(*self, self.opcode())
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}
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/// Decodes an [`Instruction`] from a word `data`.
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||||
pub fn decode(data: u32) -> Result<Self, InstructionDecodeError> {
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data.try_into()
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}
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||||
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||||
/// Returns the mnemonic for a given [`Instruction`].
|
||||
#[must_use]
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||||
pub const fn mnemonic(self) -> &'static str {
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||||
match self {
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||||
Self::Add(_) => "add",
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||||
Self::Sub(_) => "sub",
|
||||
Self::Increment(_) => "inc",
|
||||
Self::Decrement(_) => "dec",
|
||||
Self::Compare(_) => "cmp",
|
||||
Self::Halt => "hlt",
|
||||
Self::And(_) => "and",
|
||||
Self::IntReturn => "intr",
|
||||
Self::Interrupt(_) => "int",
|
||||
Self::Jump(_) => "jmp",
|
||||
Self::JumpEq(_) => "jeq",
|
||||
Self::JumpNeq(_) => "jneq",
|
||||
Self::JumpGt(_) => "jgt",
|
||||
Self::JumpGe(_) => "jge",
|
||||
Self::JumpLt(_) => "jlt",
|
||||
Self::JumpLe(_) => "jle",
|
||||
Self::Mov(_) => "mov",
|
||||
Self::MovSigned(_) => "movs",
|
||||
Self::LoadByte(_) => "ldb",
|
||||
Self::LoadByteSigned(_) => "ldbs",
|
||||
Self::LoadHalfword(_) => "ldh",
|
||||
Self::LoadHalfwordSigned(_) => "ldhs",
|
||||
Self::LoadWord(_) => "ldw",
|
||||
Self::StoreByte(_) => "stb",
|
||||
Self::StoreHalfword(_) => "sth",
|
||||
Self::StoreWord(_) => "stw",
|
||||
Self::LoadLowerImmediate(_) => "lli",
|
||||
Self::LoadUpperImmediate(_) => "lui",
|
||||
Self::ShiftLeft(_) => "shl",
|
||||
Self::ShiftRight(_) => "shr",
|
||||
Self::Or(_) => "or",
|
||||
Self::Not(_) => "not",
|
||||
Self::Nop => "nop",
|
||||
Self::Xor(_) => "xor",
|
||||
Self::Nand(_) => "nand",
|
||||
Self::Nor(_) => "nor",
|
||||
Self::Xnor(_) => "xnor",
|
||||
Self::Data(_) => "data",
|
||||
Self::AddImmediate(_) => "addi",
|
||||
Self::SubImmediate(_) => "subi",
|
||||
Self::Segment(_) => "[SEGMENT]",
|
||||
}
|
||||
}
|
||||
|
||||
/// Returns the [`InstructionType`] for the given [`Instruction`].
|
||||
#[must_use]
|
||||
pub const fn instruction_type(self) -> InstructionType {
|
||||
Self::instruction_type_from_opcode(self.opcode())
|
||||
}
|
||||
|
||||
/// Returns the [`InstructionType`] for the given `opcode`.
|
||||
#[must_use]
|
||||
pub const fn instruction_type_from_opcode(opcode: u8) -> InstructionType {
|
||||
match opcode {
|
||||
0x3..=0x13 => InstructionType::Immediate,
|
||||
_ => InstructionType::Register,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Instruction decoding logic goes here.
|
||||
impl std::fmt::Display for Instruction {
|
||||
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||
write!(f, "{}", self.mnemonic())?;
|
||||
|
||||
match self {
|
||||
Self::Mov(args) | Self::MovSigned(args) => {
|
||||
write!(f, " {}, {}", args.sr1, args.dr)
|
||||
}
|
||||
Self::LoadByte(args)
|
||||
| Self::LoadByteSigned(args)
|
||||
| Self::LoadHalfword(args)
|
||||
| Self::LoadHalfwordSigned(args)
|
||||
| Self::LoadWord(args)
|
||||
| Self::StoreByte(args)
|
||||
| Self::StoreHalfword(args)
|
||||
| Self::StoreWord(args) => {
|
||||
write!(
|
||||
f,
|
||||
" {}({:x}/{}), {}",
|
||||
args.r1, args.immediate, args.immediate, args.r2
|
||||
)
|
||||
}
|
||||
Self::Jump(args)
|
||||
| Self::JumpEq(args)
|
||||
| Self::JumpNeq(args)
|
||||
| Self::JumpGt(args)
|
||||
| Self::JumpGe(args)
|
||||
| Self::JumpLt(args)
|
||||
| Self::JumpLe(args) => {
|
||||
write!(f, " 0x{:x}/{}({})", args.immediate, args.immediate, args.r1)
|
||||
}
|
||||
Self::LoadLowerImmediate(args) | Self::LoadUpperImmediate(args) => {
|
||||
write!(f, " 0x{:x}, {}, {}", args.immediate, args.r1, args.r2)
|
||||
}
|
||||
Self::Compare(args) | Self::Not(args) => {
|
||||
write!(f, " {}, {}", args.sr1, args.sr2)
|
||||
}
|
||||
|
||||
Self::Add(args)
|
||||
| Self::Sub(args)
|
||||
| Self::Xor(args)
|
||||
| Self::Nand(args)
|
||||
| Self::Nor(args)
|
||||
| Self::Xnor(args)
|
||||
| Self::ShiftLeft(args)
|
||||
| Self::ShiftRight(args)
|
||||
| Self::And(args)
|
||||
| Self::Or(args) => {
|
||||
write!(f, " {}, {}, {}", args.sr1, args.sr2, args.dr)
|
||||
}
|
||||
|
||||
Self::AddImmediate(args) | Self::SubImmediate(args) => {
|
||||
write!(f, " {}, {}, {}", args.r1, args.immediate, args.r2)
|
||||
}
|
||||
|
||||
Self::Increment(a) | Self::Decrement(a) => write!(f, " {}", a.sr1),
|
||||
Self::Interrupt(a) => write!(f, " {}", a.as_u8()),
|
||||
Self::Data(a) => write!(f, " {a}"),
|
||||
Self::Segment(x) => write!(f, " [SEGMENT {x}]"),
|
||||
_ => Ok(()),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl TryFrom<u32> for Instruction {
|
||||
type Error = InstructionDecodeError;
|
||||
|
||||
/// Instruction decoding can be using using [`Instruction::try_from`]
|
||||
fn try_from(data: u32) -> Result<Self, Self::Error> {
|
||||
// Pull the opcode out so we can parse it correctly.
|
||||
let opcode = ((data >> 26) & 0x3F) as u8;
|
||||
|
||||
match opcode {
|
||||
0x0 => Ok(Self::Nop),
|
||||
0x1 => Ok(Self::Mov(RTypeArgs::try_from(data)?)),
|
||||
0x2 => Ok(Self::MovSigned(RTypeArgs::try_from(data)?)),
|
||||
0x3 => Ok(Self::LoadByte(ITypeArgs::try_from(data)?)),
|
||||
0x4 => Ok(Self::LoadByteSigned(ITypeArgs::try_from(data)?)),
|
||||
0x5 => Ok(Self::LoadHalfword(ITypeArgs::try_from(data)?)),
|
||||
0x6 => Ok(Self::LoadHalfwordSigned(ITypeArgs::try_from(data)?)),
|
||||
0x7 => Ok(Self::LoadWord(ITypeArgs::try_from(data)?)),
|
||||
0x8 => Ok(Self::StoreByte(ITypeArgs::try_from(data)?)),
|
||||
0x9 => Ok(Self::StoreHalfword(ITypeArgs::try_from(data)?)),
|
||||
0xA => Ok(Self::StoreWord(ITypeArgs::try_from(data)?)),
|
||||
0xB => Ok(Self::LoadLowerImmediate(ITypeArgs::try_from(data)?)),
|
||||
0xC => Ok(Self::LoadUpperImmediate(ITypeArgs::try_from(data)?)),
|
||||
0xD => Ok(Self::Jump(ITypeArgs::try_from(data)?)),
|
||||
0xE => Ok(Self::JumpEq(ITypeArgs::try_from(data)?)),
|
||||
0xF => Ok(Self::JumpNeq(ITypeArgs::try_from(data)?)),
|
||||
0x10 => Ok(Self::JumpGt(ITypeArgs::try_from(data)?)),
|
||||
0x11 => Ok(Self::JumpGe(ITypeArgs::try_from(data)?)),
|
||||
0x12 => Ok(Self::JumpLt(ITypeArgs::try_from(data)?)),
|
||||
0x13 => Ok(Self::JumpLe(ITypeArgs::try_from(data)?)),
|
||||
0x14 => Ok(Self::Compare(RTypeArgs::try_from(data)?)),
|
||||
0x15 => Ok(Self::Increment(RTypeArgs::try_from(data)?)),
|
||||
0x16 => Ok(Self::Decrement(RTypeArgs::try_from(data)?)),
|
||||
0x17 => Ok(Self::ShiftLeft(RTypeArgs::try_from(data)?)),
|
||||
0x18 => Ok(Self::ShiftRight(RTypeArgs::try_from(data)?)),
|
||||
0x19 => Ok(Self::Add(RTypeArgs::try_from(data)?)),
|
||||
0x1A => Ok(Self::Sub(RTypeArgs::try_from(data)?)),
|
||||
0x1B => Ok(Self::And(RTypeArgs::try_from(data)?)),
|
||||
0x1C => Ok(Self::Or(RTypeArgs::try_from(data)?)),
|
||||
0x1D => Ok(Self::Not(RTypeArgs::try_from(data)?)),
|
||||
0x1E => Ok(Self::Xor(RTypeArgs::try_from(data)?)),
|
||||
0x1F => Ok(Self::Nand(RTypeArgs::try_from(data)?)),
|
||||
0x20 => Ok(Self::Nor(RTypeArgs::try_from(data)?)),
|
||||
0x21 => Ok(Self::Xnor(RTypeArgs::try_from(data)?)),
|
||||
0x22 => Ok(Self::Interrupt(Interrupt::from((data & 0xFF) as u8))),
|
||||
0x23 => Ok(Self::IntReturn),
|
||||
0x24 => Ok(Self::Halt),
|
||||
0x25 => Ok(Self::AddImmediate(ITypeArgs::try_from(data)?)),
|
||||
0x26 => Ok(Self::SubImmediate(ITypeArgs::try_from(data)?)),
|
||||
0x3F => Ok(Self::Segment(u32::from(data as u8))),
|
||||
_ => Err(InstructionDecodeError::InvalidOpcode(opcode)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub mod args;
|
||||
mod encode;
|
||||
pub mod errors;
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests;
|
||||
@@ -0,0 +1,208 @@
|
||||
//! Various types of arguments that instructions can take, alongside encoding and decoding logic.
|
||||
|
||||
use crate::{
|
||||
instructions::{RegisterParseError, encode::Encode},
|
||||
prelude::Register,
|
||||
};
|
||||
|
||||
/// A list of errors that can be returned when decoding instruction arguments.
|
||||
#[derive(Debug)]
|
||||
pub enum ArgsDecodeError {
|
||||
/// The register was not valid.
|
||||
InvalidRegister(u8),
|
||||
}
|
||||
|
||||
impl From<RegisterParseError> for ArgsDecodeError {
|
||||
fn from(value: RegisterParseError) -> Self {
|
||||
match value {
|
||||
RegisterParseError::InvalidIndex(idx) => Self::InvalidRegister(idx),
|
||||
RegisterParseError::InvalidName(_) => Self::InvalidRegister(0xFF),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl std::fmt::Display for ArgsDecodeError {
|
||||
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||
match self {
|
||||
Self::InvalidRegister(idx) => {
|
||||
write!(f, "invalid register index, got {idx:x}")?;
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
impl std::error::Error for ArgsDecodeError {}
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
/// Used by instructions with 2 registers and an immediate argument.
|
||||
pub struct ITypeArgs {
|
||||
pub immediate: u16,
|
||||
pub r1: Register,
|
||||
/// May not actually be used by some instructions taking an immediate e.g. LUI. This is solved by making the constructor take Options.
|
||||
pub r2: Register,
|
||||
}
|
||||
|
||||
impl ITypeArgs {
|
||||
#[must_use]
|
||||
/// Creates a new [`ITypeArgs`]. If r1 or r2 is unset, they will be replaced with [`Register::NoReg`].
|
||||
pub fn new(immediate: u16, r1: Option<Register>, r2: Option<Register>) -> Self {
|
||||
let r1 = r1.unwrap_or_default();
|
||||
let r2 = r2.unwrap_or_default();
|
||||
|
||||
Self { immediate, r1, r2 }
|
||||
}
|
||||
}
|
||||
|
||||
impl Encode for ITypeArgs {
|
||||
/// Encodes an I-type instruction from its fields. These must have some unused high-order
|
||||
/// bits set to 0 else the bit shifting logic gets fucked.
|
||||
fn encode(self, opcode: u8) -> u32 {
|
||||
let opcode = u32::from(opcode);
|
||||
let r1 = self.r1 as u32;
|
||||
let dr = self.r2 as u32;
|
||||
let immediate = u32::from(self.immediate);
|
||||
|
||||
(opcode << 26) | (r1 << 21) | (dr << 16) | immediate
|
||||
}
|
||||
}
|
||||
|
||||
impl TryFrom<u32> for ITypeArgs {
|
||||
type Error = ArgsDecodeError;
|
||||
|
||||
fn try_from(data: u32) -> Result<Self, Self::Error> {
|
||||
let r1 = ((data >> 21) & 0x1F) as u8;
|
||||
let r2 = ((data >> 16) & 0x1F) as u8;
|
||||
let immediate = data as u16;
|
||||
|
||||
let r1 = r1.try_into()?;
|
||||
let r2 = r2.try_into()?;
|
||||
|
||||
Ok(Self { immediate, r1, r2 })
|
||||
}
|
||||
}
|
||||
|
||||
/// Used by instructions not using immediates (besides 5 bit shift values).
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
pub struct RTypeArgs {
|
||||
pub sr1: Register,
|
||||
pub sr2: Register,
|
||||
pub dr: Register,
|
||||
/// 5 bit shift amount.
|
||||
pub shamt: u8,
|
||||
}
|
||||
|
||||
impl RTypeArgs {
|
||||
#[must_use]
|
||||
/// Creates a new [`RTypeArgs`]. If any registers are unset, they will be replaced with [`Register::NoReg`]. If `shamt` is unset, it will be set to 0.
|
||||
pub fn new(
|
||||
sr1: Option<Register>,
|
||||
sr2: Option<Register>,
|
||||
dr: Option<Register>,
|
||||
shamt: Option<u8>,
|
||||
) -> Self {
|
||||
let sr1 = sr1.unwrap_or_default();
|
||||
let shamt = shamt.unwrap_or_default();
|
||||
let sr2 = sr2.unwrap_or_default();
|
||||
let dr = dr.unwrap_or_default();
|
||||
|
||||
Self {
|
||||
sr1,
|
||||
sr2,
|
||||
dr,
|
||||
shamt,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl Encode for RTypeArgs {
|
||||
/// Encodes an R-type instruction from its fields. These must have unused high-order
|
||||
/// bits set to 0 else the bit shifting logic is fucked.
|
||||
///
|
||||
/// # Arguments
|
||||
///
|
||||
/// - `shamt`: The amount to shift value (used only in shift instructions, otherwise 0).
|
||||
fn encode(self, opcode: u8) -> u32 {
|
||||
let opcode = u32::from(opcode);
|
||||
let sr1 = self.sr1 as u32;
|
||||
let sr2 = self.sr2 as u32;
|
||||
let dr = self.dr as u32;
|
||||
let shamt = u32::from(self.shamt);
|
||||
|
||||
(opcode << 26) | (sr1 << 21) | (sr2 << 16) | (dr << 11) | (shamt << 6)
|
||||
}
|
||||
}
|
||||
|
||||
impl TryFrom<u32> for RTypeArgs {
|
||||
type Error = ArgsDecodeError;
|
||||
|
||||
fn try_from(data: u32) -> Result<Self, Self::Error> {
|
||||
let sr1 = ((data >> 21) & 0x1F) as u8;
|
||||
let sr2 = ((data >> 16) & 0x1F) as u8;
|
||||
let dr = ((data >> 11) & 0x1F) as u8;
|
||||
let shamt = ((data >> 6) & 0x1F) as u8;
|
||||
|
||||
let sr1_reg = sr1.try_into()?;
|
||||
let sr2_reg = sr2.try_into()?;
|
||||
let dr_reg = dr.try_into()?;
|
||||
|
||||
Ok(Self {
|
||||
sr1: sr1_reg,
|
||||
sr2: sr2_reg,
|
||||
dr: dr_reg,
|
||||
shamt,
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
#[macro_export]
|
||||
macro_rules! args {
|
||||
// R-type arguments - allows omitting any field
|
||||
(R $(, $field:ident: $value:expr)* $(,)?) => {{
|
||||
let mut sr1: Option<Register> = None;
|
||||
let mut sr2: Option<Register> = None;
|
||||
let mut dr: Option<Register> = None;
|
||||
let mut shamt: Option<u8> = None;
|
||||
|
||||
$(
|
||||
args!(@assign_r_option sr1, sr2, dr, shamt, $field, $value);
|
||||
)*
|
||||
|
||||
RTypeArgs::new(sr1, sr2, dr, shamt)
|
||||
}};
|
||||
|
||||
// I-type arguments - requires immediate, allows omitting registers
|
||||
(I, immediate: $immediate:expr $(, $field:ident: $value:expr)* $(,)?) => {{
|
||||
let mut r1: Option<Register> = None;
|
||||
let mut r2: Option<Register> = None;
|
||||
|
||||
$(
|
||||
args!(@assign_i_option r1, r2, $field, $value);
|
||||
)*
|
||||
|
||||
ITypeArgs::new($immediate, r1, r2)
|
||||
}};
|
||||
|
||||
// Internal helpers (same as above for R-type)
|
||||
(@assign_r_option $sr1:ident, $sr2:ident, $dr:ident, $shamt:ident, sr1, $value:expr) => {
|
||||
$sr1 = Some($value);
|
||||
};
|
||||
(@assign_r_option $sr1:ident, $sr2:ident, $dr:ident, $shamt:ident, sr2, $value:expr) => {
|
||||
$sr2 = Some($value);
|
||||
};
|
||||
(@assign_r_option $sr1:ident, $sr2:ident, $dr:ident, $shamt:ident, dr, $value:expr) => {
|
||||
$dr = Some($value);
|
||||
};
|
||||
(@assign_r_option $sr1:ident, $sr2:ident, $dr:ident, $shamt:ident, shamt, $value:expr) => {
|
||||
$shamt = Some($value);
|
||||
};
|
||||
|
||||
// Internal helpers for I-type (without immediate handling)
|
||||
(@assign_i_option $r1:ident, $r2:ident, r1, $value:expr) => {
|
||||
$r1 = Some($value);
|
||||
};
|
||||
(@assign_i_option $r1:ident, $r2:ident, r2, $value:expr) => {
|
||||
$r2 = Some($value);
|
||||
};
|
||||
}
|
||||
@@ -0,0 +1,72 @@
|
||||
use crate::prelude::*;
|
||||
|
||||
/// Not to be used directly, just call [`Instruction::encode`].
|
||||
pub trait Encode {
|
||||
fn encode(self, opcode: u8) -> u32;
|
||||
}
|
||||
|
||||
/// Encodes a zero argument instruction.
|
||||
fn encode_no_args(opcode: u8) -> u32 {
|
||||
let opcode = u32::from(opcode);
|
||||
let sr1 = Register::Null as u32;
|
||||
let sr2 = Register::Null as u32;
|
||||
let dr = Register::Null as u32;
|
||||
let shamt = 0;
|
||||
|
||||
(opcode << 26) | (sr1 << 21) | (sr2 << 16) | (dr << 11) | (shamt << 6)
|
||||
}
|
||||
|
||||
/// Expands to a match statement that calls encode on instructions that implement
|
||||
/// [`Encode`]:
|
||||
///
|
||||
/// # Usage
|
||||
///
|
||||
/// ```rs
|
||||
/// encode_instruction!(self, with_args: [...], no_args: [...], special: [...] )
|
||||
/// ```
|
||||
macro_rules! encode_instruction {
|
||||
($self:expr, with_args: [$($variant:ident),+ $(,)?], no_args: [$($no_arg_variant:ident),* $(,)?] $(, special: [$($special:pat => $body:expr),* $(,)?])?) => {
|
||||
match $self {
|
||||
$(
|
||||
Instruction::$variant(args) => args.encode($self.opcode()),
|
||||
)+
|
||||
$(
|
||||
Instruction::$no_arg_variant => encode_no_args($self.opcode()),
|
||||
)*
|
||||
$($(
|
||||
$special => $body,
|
||||
)*)?
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
impl Encode for Instruction {
|
||||
fn encode(self, _: u8) -> u32 {
|
||||
encode_instruction!(
|
||||
self,
|
||||
with_args: [
|
||||
Mov, MovSigned, LoadByte, LoadByteSigned, LoadHalfword,
|
||||
LoadHalfwordSigned, LoadWord, StoreByte, StoreHalfword,
|
||||
StoreWord, LoadLowerImmediate, LoadUpperImmediate, Jump,
|
||||
JumpEq, JumpNeq, JumpGt, JumpGe, JumpLt, JumpLe, Compare,
|
||||
Add, Sub, Increment, Decrement, ShiftLeft, ShiftRight,
|
||||
And, Or, Not, Xor, Nand, Nor, Xnor, AddImmediate, SubImmediate
|
||||
],
|
||||
no_args: [Nop, IntReturn, Halt],
|
||||
special: [
|
||||
Self::Data(data) => data,
|
||||
Self::Interrupt(interrupt) => {
|
||||
let opcode = u32::from(self.opcode());
|
||||
(opcode << 26) | u32::from(interrupt.as_u8())
|
||||
},
|
||||
Self::Segment(segment) => {
|
||||
let opcode = u32::from(self.opcode());
|
||||
(opcode << 26) | u32::from(segment as u8)
|
||||
}
|
||||
]
|
||||
)
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests;
|
||||
@@ -0,0 +1,98 @@
|
||||
use crate::prelude::*;
|
||||
|
||||
#[test]
|
||||
fn test_encode_nop() {
|
||||
let no_reg = Register::Null as u32;
|
||||
let no_op = u32::from(Instruction::Nop.opcode());
|
||||
|
||||
let expected = (no_op << 26) | (no_reg << 21) | (no_reg << 16) | (no_reg << 11);
|
||||
let got = Instruction::Nop.encode();
|
||||
|
||||
assert_eq!(expected, got);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_encode_mov() {
|
||||
let rg0 = Register::Rg0 as u32;
|
||||
let rg1 = Register::Rg1 as u32;
|
||||
let no_reg = Register::Null as u32;
|
||||
|
||||
let instruction = Instruction::Mov(RTypeArgs::new(
|
||||
Some(Register::Rg0),
|
||||
None,
|
||||
Some(Register::Rg1),
|
||||
None,
|
||||
));
|
||||
let mov = u32::from(instruction.opcode());
|
||||
|
||||
let expected = (mov << 26) | (rg0 << 21) | (no_reg << 16) | (rg1 << 11);
|
||||
let got = instruction.encode();
|
||||
|
||||
assert_eq!(expected, got);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_encode_load_byte() {
|
||||
let rg0 = Register::Rg0 as u32;
|
||||
let rg1 = Register::Rg1 as u32;
|
||||
let immediate = 100;
|
||||
|
||||
let instruction = Instruction::LoadByte(ITypeArgs::new(
|
||||
immediate,
|
||||
Some(Register::Rg0),
|
||||
Some(Register::Rg1),
|
||||
));
|
||||
let load_byte = u32::from(instruction.opcode());
|
||||
|
||||
let expected = (load_byte << 26) | (rg0 << 21) | (rg1 << 16) | u32::from(immediate);
|
||||
let got = instruction.encode();
|
||||
|
||||
assert_eq!(expected, got);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_encode_shift_left_shamt() {
|
||||
let rg0 = Register::Rg0 as u32;
|
||||
let no_reg = Register::Null as u32;
|
||||
|
||||
let shift_amount = 5;
|
||||
|
||||
let instruction = Instruction::ShiftLeft(RTypeArgs::new(
|
||||
Some(Register::Rg0),
|
||||
None,
|
||||
None,
|
||||
Some(shift_amount),
|
||||
));
|
||||
let shift_left = u32::from(instruction.opcode());
|
||||
|
||||
let expected = (shift_left << 26)
|
||||
| (rg0 << 21)
|
||||
| (no_reg << 16)
|
||||
| (no_reg << 11)
|
||||
| (u32::from(shift_amount) << 6);
|
||||
|
||||
let got = instruction.encode();
|
||||
|
||||
assert_eq!(expected, got);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_encode_shift_left_reg() {
|
||||
let rg0 = Register::Rg0 as u32;
|
||||
let rg1 = Register::Rg1 as u32;
|
||||
let no_reg = Register::Null as u32;
|
||||
|
||||
let instruction = Instruction::ShiftLeft(RTypeArgs::new(
|
||||
Some(Register::Rg0),
|
||||
Some(Register::Rg1),
|
||||
None,
|
||||
None,
|
||||
));
|
||||
let shift_left = u32::from(instruction.opcode());
|
||||
|
||||
let expected = (shift_left << 26) | (rg0 << 21) | (rg1 << 16) | (no_reg << 11);
|
||||
|
||||
let got = instruction.encode();
|
||||
|
||||
assert_eq!(expected, got);
|
||||
}
|
||||
@@ -0,0 +1,56 @@
|
||||
//! All the errors that may be returned from [`instructions`].
|
||||
|
||||
use crate::prelude::*;
|
||||
|
||||
#[derive(Debug)]
|
||||
/// Error type for parsing register numbers.
|
||||
pub enum RegisterParseError {
|
||||
InvalidIndex(u8),
|
||||
InvalidName(String),
|
||||
}
|
||||
|
||||
impl std::fmt::Display for RegisterParseError {
|
||||
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||
match self {
|
||||
Self::InvalidIndex(idx) => write!(f, "invalid index given ({idx})"),
|
||||
Self::InvalidName(name) => write!(f, "invalid name given ({name})"),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl std::error::Error for RegisterParseError {}
|
||||
|
||||
/// A list of errors that can be returned when decoding instructions.
|
||||
#[derive(Debug)]
|
||||
pub enum InstructionDecodeError {
|
||||
/// Some field was incorrect. Returns an error for debugging purposes.
|
||||
InvalidArgument(ArgsDecodeError),
|
||||
/// Some opcode was invalid. Returns the offending opcode for debugging purposes etc.
|
||||
InvalidOpcode(u8),
|
||||
}
|
||||
|
||||
impl From<ArgsDecodeError> for InstructionDecodeError {
|
||||
fn from(err: ArgsDecodeError) -> Self {
|
||||
Self::InvalidArgument(err)
|
||||
}
|
||||
}
|
||||
|
||||
impl std::fmt::Display for InstructionDecodeError {
|
||||
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||
match self {
|
||||
Self::InvalidOpcode(code) => write!(f, "invalid opcode, got {code:x}")?,
|
||||
Self::InvalidArgument(err) => write!(f, "invalid arguments, got an error {err}")?,
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
impl std::error::Error for InstructionDecodeError {
|
||||
fn source(&self) -> Option<&(dyn std::error::Error + 'static)> {
|
||||
match self {
|
||||
Self::InvalidArgument(err) => Some(err),
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,215 @@
|
||||
#![allow(clippy::unwrap_used)]
|
||||
use crate::prelude::*;
|
||||
|
||||
#[test]
|
||||
fn test_opcode_nop() {
|
||||
let instr = Instruction::Nop;
|
||||
assert_eq!(instr.opcode(), 0x0);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_data_transfer() {
|
||||
let args = RTypeArgs::new(None, None, None, None);
|
||||
assert_eq!(Instruction::Mov(args).opcode(), 0x1);
|
||||
assert_eq!(Instruction::MovSigned(args).opcode(), 0x2);
|
||||
|
||||
let iargs = ITypeArgs::new(0, None, None);
|
||||
assert_eq!(Instruction::LoadByte(iargs).opcode(), 0x3);
|
||||
assert_eq!(Instruction::LoadByteSigned(iargs).opcode(), 0x4);
|
||||
assert_eq!(Instruction::LoadHalfword(iargs).opcode(), 0x5);
|
||||
assert_eq!(Instruction::LoadHalfwordSigned(iargs).opcode(), 0x6);
|
||||
assert_eq!(Instruction::LoadWord(iargs).opcode(), 0x7);
|
||||
assert_eq!(Instruction::StoreByte(iargs).opcode(), 0x8);
|
||||
assert_eq!(Instruction::StoreHalfword(iargs).opcode(), 0x9);
|
||||
assert_eq!(Instruction::StoreWord(iargs).opcode(), 0xA);
|
||||
assert_eq!(Instruction::LoadLowerImmediate(iargs).opcode(), 0xB);
|
||||
assert_eq!(Instruction::LoadUpperImmediate(iargs).opcode(), 0xC);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_jump_instructions() {
|
||||
let args = ITypeArgs::new(0, None, None);
|
||||
assert_eq!(Instruction::Jump(args).opcode(), 0xD);
|
||||
assert_eq!(Instruction::JumpEq(args).opcode(), 0xE);
|
||||
assert_eq!(Instruction::JumpNeq(args).opcode(), 0xF);
|
||||
assert_eq!(Instruction::JumpGt(args).opcode(), 0x10);
|
||||
assert_eq!(Instruction::JumpGe(args).opcode(), 0x11);
|
||||
assert_eq!(Instruction::JumpLt(args).opcode(), 0x12);
|
||||
assert_eq!(Instruction::JumpLe(args).opcode(), 0x13);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_arithmetic() {
|
||||
let args = RTypeArgs::new(None, None, None, None);
|
||||
assert_eq!(Instruction::Compare(args).opcode(), 0x14);
|
||||
assert_eq!(Instruction::Increment(args).opcode(), 0x15);
|
||||
assert_eq!(Instruction::Decrement(args).opcode(), 0x16);
|
||||
assert_eq!(Instruction::ShiftLeft(args).opcode(), 0x17);
|
||||
assert_eq!(Instruction::ShiftRight(args).opcode(), 0x18);
|
||||
assert_eq!(Instruction::Add(args).opcode(), 0x19);
|
||||
assert_eq!(Instruction::Sub(args).opcode(), 0x1A);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_logical() {
|
||||
let args = RTypeArgs::new(None, None, None, None);
|
||||
assert_eq!(Instruction::And(args).opcode(), 0x1B);
|
||||
assert_eq!(Instruction::Or(args).opcode(), 0x1C);
|
||||
assert_eq!(Instruction::Not(args).opcode(), 0x1D);
|
||||
assert_eq!(Instruction::Xor(args).opcode(), 0x1E);
|
||||
assert_eq!(Instruction::Nand(args).opcode(), 0x1F);
|
||||
assert_eq!(Instruction::Nor(args).opcode(), 0x20);
|
||||
assert_eq!(Instruction::Xnor(args).opcode(), 0x21);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_misc() {
|
||||
let interrupt = Interrupt::Software(5);
|
||||
assert_eq!(Instruction::Interrupt(interrupt).opcode(), 0x22);
|
||||
assert_eq!(Instruction::IntReturn.opcode(), 0x23);
|
||||
assert_eq!(Instruction::Halt.opcode(), 0x24);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_with_different_args() {
|
||||
let args1 = RTypeArgs::new(
|
||||
Some(Register::Rg0),
|
||||
Some(Register::Rg1),
|
||||
Some(Register::Rg2),
|
||||
Some(5),
|
||||
);
|
||||
let args2 = RTypeArgs::new(
|
||||
Some(Register::Acc),
|
||||
Some(Register::Spr),
|
||||
Some(Register::Bpr),
|
||||
Some(31),
|
||||
);
|
||||
|
||||
// Opcode should be the same regardless of arguments
|
||||
assert_eq!(
|
||||
Instruction::Add(args1).opcode(),
|
||||
Instruction::Add(args2).opcode()
|
||||
);
|
||||
assert_eq!(
|
||||
Instruction::Sub(args1).opcode(),
|
||||
Instruction::Sub(args2).opcode()
|
||||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_opcode_boundary_values() {
|
||||
// Test highest opcode value
|
||||
assert_eq!(Instruction::Halt.opcode(), 0x24);
|
||||
|
||||
// Test lowest opcode value
|
||||
assert_eq!(Instruction::Nop.opcode(), 0x0);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_nop() {
|
||||
let instr = Instruction::Nop;
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_data_transfer() {
|
||||
let args = RTypeArgs::new(
|
||||
Some(Register::Rg0),
|
||||
Some(Register::Rg1),
|
||||
Some(Register::Rg2),
|
||||
Some(5),
|
||||
);
|
||||
let instr = Instruction::Mov(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
|
||||
let iargs = ITypeArgs::new(100, Some(Register::Rg3), Some(Register::Rg4));
|
||||
let instr = Instruction::LoadWord(iargs);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_jump() {
|
||||
let args = ITypeArgs::new(200, Some(Register::Acc), Some(Register::Spr));
|
||||
let instr = Instruction::Jump(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
|
||||
let instr = Instruction::JumpEq(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_arithmetic() {
|
||||
let args = RTypeArgs::new(
|
||||
Some(Register::Bpr),
|
||||
Some(Register::Rg7),
|
||||
Some(Register::Rgf),
|
||||
Some(31),
|
||||
);
|
||||
let instr = Instruction::Add(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
|
||||
let instr = Instruction::Compare(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_logical() {
|
||||
let args = RTypeArgs::new(
|
||||
Some(Register::Rg8),
|
||||
Some(Register::Rg9),
|
||||
Some(Register::Rga),
|
||||
Some(15),
|
||||
);
|
||||
let instr = Instruction::And(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
|
||||
let instr = Instruction::Xor(args);
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_misc() {
|
||||
let instr = Instruction::Halt;
|
||||
let encoded = instr.encode();
|
||||
let decoded = Instruction::decode(encoded).unwrap();
|
||||
assert_eq!(instr, decoded);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_instruction_decode_invalid() {
|
||||
// Test with invalid opcode.
|
||||
let invalid_encoded = 0xF500_0000;
|
||||
let decode = Instruction::decode(invalid_encoded);
|
||||
|
||||
dbg!(&decode);
|
||||
|
||||
assert!(decode.is_err());
|
||||
}
|
||||
|
||||
// TODO: Get interrupts working.
|
||||
// #[test]
|
||||
// fn test_instruction_decode_interrupt() {
|
||||
// let interrupt = Interrupt::Software(10);
|
||||
// let instr = Instruction::Interrupt(interrupt);
|
||||
// let encoded = instr.encode();
|
||||
// let decoded = Instruction::decode(encoded).unwrap();
|
||||
// assert_eq!(instr, decoded);
|
||||
// }
|
||||
@@ -0,0 +1,24 @@
|
||||
#![deny(
|
||||
clippy::unwrap_used,
|
||||
clippy::nursery,
|
||||
clippy::perf,
|
||||
clippy::pedantic,
|
||||
clippy::complexity
|
||||
)]
|
||||
#![allow(
|
||||
clippy::cast_possible_truncation,
|
||||
clippy::missing_panics_doc,
|
||||
clippy::missing_errors_doc,
|
||||
clippy::match_wildcard_for_single_variants
|
||||
)]
|
||||
|
||||
pub mod build;
|
||||
pub mod instructions;
|
||||
pub mod logging;
|
||||
|
||||
pub mod prelude {
|
||||
//! A collection of types you should definitely import when working with this crate.
|
||||
pub use super::instructions::{
|
||||
Address, Instruction, InstructionType, Interrupt, Register, args::*, errors::*,
|
||||
};
|
||||
}
|
||||
@@ -0,0 +1,65 @@
|
||||
use std::sync::{Arc, mpsc};
|
||||
|
||||
pub fn info(message: &str) {
|
||||
println!("\x1b[32mINFO:\x1b[0m {message}");
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct LogReceiver {
|
||||
logs_rx: mpsc::Receiver<String>,
|
||||
sender: Logger,
|
||||
use_stdio: bool,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone)]
|
||||
pub struct Logger {
|
||||
use_stdio: bool,
|
||||
logs_tx: Arc<mpsc::Sender<String>>,
|
||||
}
|
||||
|
||||
impl Logger {
|
||||
#[must_use]
|
||||
pub fn new(logs_tx: mpsc::Sender<String>, use_stdio: bool) -> Self {
|
||||
Self {
|
||||
use_stdio: true,
|
||||
logs_tx: Arc::new(logs_tx),
|
||||
}
|
||||
}
|
||||
|
||||
pub fn info(&self, message: &str) {
|
||||
let res = format!("\x1b[32mINFO:\x1b[0m {message}");
|
||||
if self.use_stdio {
|
||||
println!("{res}");
|
||||
}
|
||||
|
||||
self.logs_tx.send(res).expect("Failed to send log message");
|
||||
}
|
||||
}
|
||||
|
||||
impl LogReceiver {
|
||||
#[must_use]
|
||||
pub fn new(use_stdio: bool) -> Self {
|
||||
let (logs_tx, logs_rx) = mpsc::channel();
|
||||
Self {
|
||||
use_stdio,
|
||||
logs_rx,
|
||||
sender: Logger::new(logs_tx, use_stdio),
|
||||
}
|
||||
}
|
||||
|
||||
#[must_use]
|
||||
pub fn logs(&self) -> Vec<String> {
|
||||
self.logs_rx.try_iter().collect()
|
||||
}
|
||||
|
||||
#[must_use]
|
||||
pub fn logger(&self) -> Logger {
|
||||
self.sender.clone()
|
||||
}
|
||||
}
|
||||
|
||||
impl Default for LogReceiver {
|
||||
fn default() -> Self {
|
||||
Self::new(true)
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user