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commented out emulator boot logic for now. acting like real hardware with configurable memory mapping is a future goal.

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zxq5
2026-08-02 03:00:09 +01:00
parent 59c26564d3
commit e6ae60a798
1 changed files with 15 additions and 15 deletions
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emulator/dsa_emulator/src/processor/dsa_core.rs
+15 -15
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@@ -1,13 +1,12 @@
use common::isa::instructions::Opcode;
use common::prelude::{Instruction, Register};
use crate::config::{IoMap, MemoryMap, RegionType};
use crate::DsaError; use crate::DsaError;
use crate::DsaError::BootFailure; use crate::config::{IoMap, MemoryMap, RegionType};
use crate::memory::mmu::MMU; use crate::memory::mmu::MMU;
use crate::memory::ram::{MemoryBank, Page}; use crate::memory::ram::{MemoryBank, Page};
use crate::processor::interrupts::Interrupt; use crate::processor::interrupts::Interrupt;
use crate::processor::state::{ProcessorSnapshot, SharedState};
use crate::processor::state::RunningState::Running; use crate::processor::state::RunningState::Running;
use crate::processor::state::ProcessorSnapshot;
use common::isa::instructions::Opcode;
use common::prelude::{Instruction, Register};
#[derive(Copy, Clone, Debug)] #[derive(Copy, Clone, Debug)]
pub enum ExecutionResult { pub enum ExecutionResult {
@@ -28,7 +27,6 @@ pub struct DsaProcessor {
} }
impl DsaProcessor { impl DsaProcessor {
pub fn reset(&mut self) { pub fn reset(&mut self) {
self.internal_state = ProcessorSnapshot::default(); self.internal_state = ProcessorSnapshot::default();
self.mmu = MMU::new(); self.mmu = MMU::new();
@@ -259,7 +257,9 @@ impl DsaProcessor {
self.reg(Register::Pcx) self.reg(Register::Pcx)
); );
} }
Some(Opcode::Int) => return ExecutionResult::Interrupt(Interrupt::Software(word.imm16() as u8)), Some(Opcode::Int) => {
return ExecutionResult::Interrupt(Interrupt::Software(word.imm16() as u8));
}
Some(Opcode::Hlt) => return ExecutionResult::Halt, Some(Opcode::Hlt) => return ExecutionResult::Halt,
None => return ExecutionResult::Interrupt(Interrupt::InvalidOpcode), None => return ExecutionResult::Interrupt(Interrupt::InvalidOpcode),
} }
@@ -363,13 +363,13 @@ impl DsaProcessor {
} }
pub fn boot(&mut self) -> Result<(), DsaError> { pub fn boot(&mut self) -> Result<(), DsaError> {
if !(self.__mmap_configured) { // if !(self.__mmap_configured) {
return Err(BootFailure("Emulator<Mem> not configured".to_string())); // return Err(BootFailure("Emulator<Mem> not configured".to_string()));
} // }
//
if let Some(map) = &self.memory_map { // if let Some(map) = &self.memory_map {
MemoryMap::identity_map(&mut self.mmu, map.regions.get(0).unwrap()); // MemoryMap::identity_map(&mut self.mmu, map.regions.get(0).unwrap());
} // }
self.internal_state.running = Running; self.internal_state.running = Running;
Ok(()) Ok(())
@@ -389,4 +389,4 @@ impl Drop for DsaProcessor {
// drop is only ever called once on an dsa_emulator instance, so we can be sure a double free will not happen. // drop is only ever called once on an dsa_emulator instance, so we can be sure a double free will not happen.
unsafe { self.mainstore.dealloc() } unsafe { self.mainstore.dealloc() }
} }
} }