started assembler logic rewrite

This commit is contained in:
2026-03-13 16:39:58 +00:00
parent 6da473c272
commit 06c6ba534d
15 changed files with 359 additions and 27 deletions
+1 -1
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@@ -1,4 +1,4 @@
use common::instructions::Instruction;
use common::isa::instructions::Instruction;
use dsa::{BulkAllocStore, Emulator, Page, RandomAccessMemory};
/// DSA Emulator Benchmark
///
+5 -8
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@@ -1,18 +1,15 @@
use clap::Parser;
use common::{instructions::Instruction, register::Register};
use common::isa::instructions::Instruction;
use dsa::{
BulkAllocStore, Emulator, Page, RandomAccessMemory, SharedState,
args::DsaArgs,
io::display::{DisplayDevice, DisplayHandle},
args::DsaArgs, io::display::{DisplayDevice, DisplayHandle}, BulkAllocStore, Emulator, Page,
RandomAccessMemory,
SharedState,
};
use std::{
os::unix::thread::JoinHandleExt,
process::exit,
sync::{Arc, atomic::Ordering},
sync::{atomic::Ordering, Arc},
thread,
time::Duration,
};
fn main() {
let args = DsaArgs::parse();
+6 -9
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@@ -1,26 +1,23 @@
use std::{
hint::unlikely,
ops::{Add, AddAssign},
ops::AddAssign,
sync::{
Arc,
atomic::Ordering,
mpsc::{self, TryRecvError},
Arc,
},
thread,
time::{Duration, Instant},
};
use common::{
instructions::{Instruction, Opcode},
register::Register,
};
use common::isa::instructions::{Instruction, Opcode};
use common::isa::register::Register;
use crate::{
Page,
config::{IoMapping, MemoryMap, RegionType},
io::{IoAccess, IoDevice, MappedDevice},
io::{IoDevice, MappedDevice},
memory::{mmu::MMU, ram::RandomAccessMemory},
processor::{interrupts::Interrupt, state::SharedState},
Page,
};
pub struct Emulator<Mem: RandomAccessMemory> {