refactor mega-commit.

- reorganised the entire project so that the entire kernel is a single codebase rather than a kernel and a libk.

kernel/src/arch/x86_64/processing/async_io/mod.rs

@@ -0,0 +1 @@
+pub mod task;

kernel/src/arch/x86_64/processing/async_io/task.rs

@@ -0,0 +1,148 @@
+//! Allows creation of asynchronous IO bound tasks.
+//!
+//! Written by @zxq5 for the most part with code from
+//! [here](https://github.com/phil-opp/blog_os/).
+//!
+
+use alloc::boxed::Box;
+use alloc::collections::BTreeMap;
+use alloc::sync::Arc;
+use alloc::task::Wake;
+use core::{
+    future::Future,
+    pin::Pin,
+    sync::atomic::AtomicU64,
+    task::{Context, Poll, Waker},
+};
+use crossbeam::queue::ArrayQueue;
+use x86_64::instructions::interrupts::{self, enable_and_hlt};
+
+pub struct Task {
+    id: TaskId,
+    future: Pin<Box<dyn Future<Output = ()>>>,
+}
+
+impl Task {
+    pub fn new(future: impl Future<Output = ()> + 'static) -> Self {
+        Self {
+            id: TaskId::new(),
+            future: Box::pin(future),
+        }
+    }
+
+    fn poll(&mut self, context: &mut Context) -> Poll<()> {
+        self.future.as_mut().poll(context)
+    }
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
+struct TaskId(u64);
+
+impl TaskId {
+    fn new() -> Self {
+        static NEXT: AtomicU64 = AtomicU64::new(0);
+        Self(NEXT.fetch_add(1, core::sync::atomic::Ordering::Relaxed))
+    }
+}
+
+pub struct Executor {
+    tasks: BTreeMap<TaskId, Task>,
+    task_queue: Arc<ArrayQueue<TaskId>>,
+    waker_cache: BTreeMap<TaskId, Waker>,
+}
+
+impl Executor {
+    pub fn new() -> Self {
+        Self {
+            tasks: BTreeMap::new(),
+            task_queue: Arc::new(ArrayQueue::new(100)),
+            waker_cache: BTreeMap::new(),
+        }
+    }
+
+    pub fn spawn(&mut self, task: Task) {
+        let task_id = task.id;
+        if self.tasks.insert(task.id, task).is_some() {
+            panic!("task with same id already in tasks");
+        }
+        self.task_queue.push(task_id).expect("queue full");
+    }
+
+    fn run_ready_tasks(&mut self) {
+        // destructure `self` to avoid borrow checker errors
+        let Self {
+            tasks,
+            task_queue,
+            waker_cache,
+        } = self;
+
+        while let Some(task_id) = task_queue.pop() {
+            let task = match tasks.get_mut(&task_id) {
+                Some(task) => task,
+                None => continue, // task no longer exists
+            };
+            let waker = waker_cache
+                .entry(task_id)
+                .or_insert_with(|| TaskWaker::new_waker(task_id, task_queue.clone()));
+            let mut context = Context::from_waker(waker);
+            match task.poll(&mut context) {
+                Poll::Ready(()) => {
+                    // task done -> remove it and its cached waker
+                    tasks.remove(&task_id);
+                    waker_cache.remove(&task_id);
+                }
+                Poll::Pending => {}
+            }
+        }
+    }
+
+    pub fn run(&mut self) -> ! {
+        loop {
+            self.run_ready_tasks();
+            self.sleep_if_idle();
+        }
+    }
+
+    fn sleep_if_idle(&self) {
+        interrupts::disable();
+        if self.task_queue.is_empty() {
+            enable_and_hlt();
+        } else {
+            interrupts::enable();
+        }
+    }
+}
+
+impl Default for Executor {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
+struct TaskWaker {
+    task_id: TaskId,
+    task_queue: Arc<ArrayQueue<TaskId>>,
+}
+
+impl TaskWaker {
+    fn wake_task(&self) {
+        self.task_queue.push(self.task_id).expect("task_queue full");
+    }
+
+    fn new_waker(task_id: TaskId, task_queue: Arc<ArrayQueue<TaskId>>) -> Waker {
+        Waker::from(Arc::new(Self {
+            task_id,
+            task_queue,
+        }))
+    }
+}
+
+impl Wake for TaskWaker {
+    fn wake(self: Arc<Self>) {
+        self.wake_task();
+    }
+
+    fn wake_by_ref(self: &Arc<Self>) {
+        self.wake_task();
+    }
+}

kernel/src/arch/x86_64/processing/mod.rs

@@ -0,0 +1,2 @@
+pub mod async_io;
+pub mod threading;

kernel/src/arch/x86_64/processing/threading/deprecated.rs

@@ -0,0 +1,116 @@
+mod switch;
+mod deprecated;
+
+use core::arch::asm;
+
+#[repr(C)]
+pub struct Thread {
+    id: usize,
+    /// This shall be default before the program is interrupted, otherwise it will store
+    /// CPU registers etc to be restored on context switch.
+    ctx: ThreadContext,
+}
+
+/// CPU state to be saved on context switches.
+#[repr(C)]
+#[derive(Default)]
+pub struct ThreadContext {
+    /// Accumulator register.
+    rax: u64,
+    /// Base register.
+    rbx: u64,
+    /// Counter register.
+    rcx: u64,
+    /// Data register.
+    rdx: u64,
+    /// Source index register.
+    rsi: u64,
+    /// Destination index register.
+    rdi: u64,
+    /// Base pointer register.
+    rbp: u64,
+    /// Stack pointer register.
+    rsp: u64,
+    /// An extended register.
+    r8: u64,
+    /// An extended register.
+    r9: u64,
+    /// An extended register.
+    r10: u64,
+    /// An extended register.
+    r11: u64,
+    /// An extended register.
+    r12: u64,
+    /// An extended register.
+    r13: u64,
+    /// An extended register.
+    r14: u64,
+    /// An extended register.
+    r15: u64,
+    /// The instruction pointer.
+    rip: u64,
+    /// RFLAGS register.
+    rflags: u64,
+}
+
+impl ThreadContext {
+    /// Saves the current registers of the CPU before a context switch
+    /// to be restored later.
+    ///
+    /// # Notes
+    ///
+    /// This function should ONLY be called in interrupt handlers such
+    /// as that of the timer. This will then save registers as required
+    ///
+    ///
+    /// # Safety
+    ///
+    /// This function is unsafe because of the usage of inline ASM.
+    #[inline(always)]
+    pub unsafe fn save_registers() -> Self {
+        let mut context = Self::default();
+        unsafe {
+            asm!(
+            "mov {0}, rax",
+            "mov {1}, rbx",
+            "mov {2}, rcx",
+            "mov {3}, rdx",
+            "mov {4}, rsi",
+            "mov {5}, rdi",
+            "mov {6}, rbp",
+            "mov {7}, rsp",
+            "mov {8}, r8",
+            "mov {9}, r9",
+            "mov {10}, r10",
+            "mov {11}, r11",
+            "mov {12}, r12",
+            "mov {13}, r13",
+            "mov {14}, r14",
+            "mov {15}, r15",
+            "lea {16}, [rip]",
+            "pushf",
+            "pop {17}",
+            out(reg) context.rax,
+            out(reg) context.rbx,
+            out(reg) context.rcx,
+            out(reg) context.rdx,
+            out(reg) context.rsi,
+            out(reg) context.rdi,
+            out(reg) context.rbp,
+            out(reg) context.rsp,
+            out(reg) context.r8,
+            out(reg) context.r9,
+            out(reg) context.r10,
+            out(reg) context.r11,
+            out(reg) context.r12,
+            out(reg) context.r13,
+            out(reg) context.r14,
+            out(reg) context.r15,
+            out(reg) context.rip,
+            out(reg) context.rflags,
+            );
+        }
+
+        context
+    }
+}

kernel/src/arch/x86_64/processing/threading/mod.rs

@@ -0,0 +1,45 @@
+use x86_64::VirtAddr;
+
+mod switch;
+
+#[derive(Debug)]
+pub struct Thread {
+    id: ThreadId,
+    stack_ptr: Option<VirtAddr>,
+    stack_bounds: Option<StackBounds>,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
+pub struct StackBounds {
+    start: VirtAddr,
+    end: VirtAddr,
+}
+
+impl StackBounds {
+    pub fn new(start: VirtAddr, end: VirtAddr) -> Self {
+        Self { start, end }
+    }
+
+    pub fn start(&self) -> VirtAddr {
+        self.start
+    }
+
+    pub fn end(&self) -> VirtAddr {
+        self.end
+    }
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
+pub struct ThreadId(u64);
+
+impl ThreadId {
+    pub fn as_u64(&self) -> u64 {
+        self.0
+    }
+
+    fn new() -> Self {
+        use core::sync::atomic::{AtomicU64, Ordering};
+        static NEXT_THREAD_ID: AtomicU64 = AtomicU64::new(1);
+        ThreadId(NEXT_THREAD_ID.fetch_add(1, Ordering::Relaxed))
+    }
+}

kernel/src/arch/x86_64/processing/threading/switch.rs

@@ -0,0 +1 @@
+