refactor mega-commit.

- reorganised the entire project so that the entire kernel is a single codebase rather than a kernel and a libk.

kernel/src/arch/x86_64/cpu/apic.rs

@@ -0,0 +1,102 @@
+use core::arch::x86_64::__cpuid;
+
+use crate::arch::x86_64::memory::memory_map::PHYSICAL_MEMORY_OFFSET;
+use crate::serial_print;
+use x86_64::{
+    PhysAddr, VirtAddr,
+    structures::paging::{Mapper, Page, PageTableFlags, PhysFrame, Size4KiB},
+};
+
+use crate::arch::x86_64::cpu::msr::*;
+use crate::arch::x86_64::memory::memory::{FRAME_ALLOCATOR, OFFSET_PAGE_TABLE};
+
+const IA32_APIC_BASE_MSR: u32 = 0x1b;
+const IA32_APIC_BASE_MSR_BSP: u64 = 0x100;
+const IA32_APIC_BASE_MSR_ENABLE: u64 = 0x800;
+const IA32_APIC_BASE_MSR_DISABLE: u64 = !IA32_APIC_BASE_MSR_ENABLE;
+
+const CPUID_FEAT_EDX_APIC: u64 = 1 << 9; // the cpuid instruction will return this flag if it supports APIC
+
+// const APIC_VIRTUAL_ADDRESS: Lazy<VirtAddr> = Lazy::new(|| {
+//     let apic_base = get_apic_base();
+//     let virt_addr = unsafe { phys_to_virt(apic_base) };
+
+//     virt_addr
+// });
+
+fn set_apic_base_enable(apic: PhysAddr) {
+    let rax = (apic.as_u64() & 0xfffff0000) | IA32_APIC_BASE_MSR_ENABLE;
+    cpu_set_msr(IA32_APIC_BASE_MSR, rax);
+}
+
+fn set_apic_base_disable(apic: PhysAddr) {
+    let rax = (apic.as_u64() & 0xfffff0000) & IA32_APIC_BASE_MSR_DISABLE;
+    cpu_set_msr(IA32_APIC_BASE_MSR, rax);
+}
+
+fn get_apic_base() -> PhysAddr {
+    let mut value: u64 = 0;
+    cpu_get_msr(IA32_APIC_BASE_MSR, &mut value);
+    PhysAddr::new(value & 0xfffff0000)
+}
+
+fn write_apic_register(apic_base: &VirtAddr, reg: u8, value: u32) {
+    let apic_base = apic_base.as_u64();
+    let reg_addr = (apic_base & 0xFFFFF0000) + reg as u64;
+    unsafe { *(reg_addr as *mut u32) = value };
+}
+
+fn read_apic_register(apic_base: &VirtAddr, reg: u8) -> u32 {
+    let apic_base = apic_base.as_u64();
+
+    serial_print!("got apic base");
+
+    let reg_addr = (apic_base & 0xFFFFF0000) + reg as u64;
+    unsafe { *(reg_addr as *const u32) }
+}
+
+pub fn check_apic() -> bool {
+    let res = unsafe { __cpuid(1) };
+    res.edx as u64 & CPUID_FEAT_EDX_APIC != 0
+}
+
+#[inline(always)]
+unsafe fn phys_to_virt(phys: PhysAddr) -> VirtAddr {
+    let phys = phys.as_u64();
+    phys.checked_add(*PHYSICAL_MEMORY_OFFSET)
+        .map_or_else(|| panic!(" overflow"), VirtAddr::new)
+}
+
+pub fn enable_apic() {
+    let mut mapper = OFFSET_PAGE_TABLE.get().unwrap().lock();
+    let mut frame_allocator = FRAME_ALLOCATOR.get().unwrap().lock();
+
+    let apic_phys_addr = get_apic_base();
+    set_apic_base_enable(apic_phys_addr);
+    // map virt address of apic
+
+    let apic_virt = unsafe { phys_to_virt(apic_phys_addr) };
+    let page: Page<Size4KiB> = Page::containing_address(apic_virt);
+    let frame: PhysFrame<Size4KiB> = PhysFrame::containing_address(apic_phys_addr);
+    let flags: PageTableFlags = PageTableFlags::PRESENT | PageTableFlags::WRITABLE;
+
+    unsafe {
+        match mapper.map_to(page, frame, flags, &mut *frame_allocator) {
+            Ok(_) => {}
+            Err(why) => panic!("failed to map apic: {:?}", why),
+        }
+    }
+
+    // // FIXME: this causes a page fault
+    // // TODO: map to virtual memory
+
+    let reg = read_apic_register(&apic_virt, 0xF0);
+
+    serial_print!("ok2");
+
+    write_apic_register(&apic_virt, 0xF0, reg | 0x100);
+}
+
+pub struct Apic {}
+
+pub enum ApicVector {}